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Message-ID: <e893c298-fbfa-4ae4-9b76-72a5030a5530@quicinc.com>
Date: Thu, 11 Jan 2024 23:59:59 +0800
From: Jie Luo <quic_luoj@...cinc.com>
To: Andrew Lunn <andrew@...n.ch>
CC: <andersson@...nel.org>, <konrad.dybcio@...aro.org>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>,
<linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <netdev@...r.kernel.org>,
<quic_kkumarcs@...cinc.com>, <quic_suruchia@...cinc.com>,
<quic_soni@...cinc.com>, <quic_pavir@...cinc.com>,
<quic_souravp@...cinc.com>, <quic_linchen@...cinc.com>,
<quic_leiwei@...cinc.com>
Subject: Re: [PATCH 3/6] arm64: dts: qcom: ipq5332: Add MDIO device tree
On 1/10/2024 9:35 PM, Andrew Lunn wrote:
> On Wed, Jan 10, 2024 at 07:20:56PM +0800, Luo Jie wrote:
>> Add the MDIO device tree of ipq5332.
>>
>> Signed-off-by: Luo Jie <quic_luoj@...cinc.com>
>> ---
>> arch/arm64/boot/dts/qcom/ipq5332.dtsi | 44 +++++++++++++++++++++++++++
>> 1 file changed, 44 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
>> index bc89480820cb..e6c780e69d6e 100644
>> --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
>> @@ -214,6 +214,38 @@ serial_0_pins: serial0-state {
>> drive-strength = <8>;
>> bias-pull-up;
>> };
>> +
>> + mdio0_pins: mdio0-state {
>> + mux_0 {
>> + pins = "gpio25";
>> + function = "mdc0";
>> + drive-strength = <8>;
>> + bias-disable;
>> + };
>> +
>> + mux_1 {
>> + pins = "gpio26";
>> + function = "mdio0";
>> + drive-strength = <8>;
>> + bias-pull-up;
>> + };
>> + };
>> +
>> + mdio1_pins: mdio1-state {
>> + mux_0 {
>> + pins = "gpio27";
>> + function = "mdc1";
>> + drive-strength = <8>;
>> + bias-disable;
>> + };
>> +
>> + mux_1 {
>> + pins = "gpio28";
>> + function = "mdio1";
>> + drive-strength = <8>;
>> + bias-pull-up;
>> + };
>
> I don't know why i'm asking this, because i don't really expect a
> usable answer. What sort of MUX is this? Should you be using one of
> the muxes in drivers/net/mdio/mdio-mux-* or something similar?
>
> Andrew
Sorry for the confusion, the pin nodes are for the MDIO and MDC, these
PINs are used by the dedicated hardware MDIO block in the SoC. I will
update the node name from mux_0 to MDC, mux_1 to MDIO, to make it clear.
The driver for this node is drivers/net/mdio/mdio-ipq4019.c, it is not
related to the mdio-mux-* code.
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