netdev - Re: [PATCH 0/9] PCI: introduce the concept of power sequencing of PCIe devices

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Message-ID: <CAMRc=MeV6hrPGkxjg4qnK6xH2_5LhjCLtijxEFJGiikW-P2OJg@mail.gmail.com>
Date: Thu, 18 Jan 2024 08:38:29 -0800
From: Bartosz Golaszewski <brgl@...ev.pl>
To: Rob Herring <robh+dt@...nel.org>
Cc: Kalle Valo <kvalo@...nel.org>, "David S . Miller" <davem@...emloft.net>, 
	Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, 
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>, 
	Bjorn Andersson <andersson@...nel.org>, Konrad Dybcio <konrad.dybcio@...aro.org>, 
	Catalin Marinas <catalin.marinas@....com>, Will Deacon <will@...nel.org>, 
	Bjorn Helgaas <bhelgaas@...gle.com>, Heiko Stuebner <heiko@...ech.de>, 
	Jernej Skrabec <jernej.skrabec@...il.com>, Chris Morgan <macromorgan@...mail.com>, 
	Linus Walleij <linus.walleij@...aro.org>, Geert Uytterhoeven <geert+renesas@...der.be>, 
	Arnd Bergmann <arnd@...db.de>, Neil Armstrong <neil.armstrong@...aro.org>, 
	Nícolas F . R . A . Prado <nfraprado@...labora.com>, 
	Marek Szyprowski <m.szyprowski@...sung.com>, Peng Fan <peng.fan@....com>, 
	Robert Richter <rrichter@....com>, Dan Williams <dan.j.williams@...el.com>, 
	Jonathan Cameron <Jonathan.Cameron@...wei.com>, Terry Bowman <terry.bowman@....com>, 
	Lukas Wunner <lukas@...ner.de>, Huacai Chen <chenhuacai@...nel.org>, Alex Elder <elder@...aro.org>, 
	Srini Kandagatla <srinivas.kandagatla@...aro.org>, 
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>, Abel Vesa <abel.vesa@...aro.org>, 
	linux-wireless@...r.kernel.org, netdev@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	linux-arm-msm@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, 
	linux-pci@...r.kernel.org, 
	Bartosz Golaszewski <bartosz.golaszewski@...aro.org>, Bartosz Golaszewski <brgl@...ev.pl>
Subject: Re: [PATCH 0/9] PCI: introduce the concept of power sequencing of
 PCIe devices

On Thu, 18 Jan 2024 15:29:01 +0100, Rob Herring <robh+dt@...nel.org> said:
> On Wed, Jan 17, 2024 at 10:08 AM Bartosz Golaszewski <brgl@...ev.pl> wrote:
>

[snip]

>
>> The general idea is to instantiate platform devices for child nodes of
>> the PCIe port DT node. For those nodes for which a power-sequencing
>> driver exists, we bind it and let it probe. The driver then triggers a
>> rescan of the PCI bus with the aim of detecting the now powered-on
>> device. The device will consume the same DT node as the platform,
>> power-sequencing device. We use device links to make the latter become
>> the parent of the former.
>>
>> The main advantage of this approach is not modifying the existing DT in
>> any way and especially not adding any "fake" platform devices.
>
> Suspend/resume has been brought up already, but I disagree we can
> worry about that later unless there is and always will be no power
> sequencing during suspend/resume for all devices ever. Given the
> supplies aren't standard, it wouldn't surprise me if standard PCI
> power management isn't either. The primary issue I see with this
> design is we will end up with 2 drivers doing the same power
> sequencing: the platform driver for initial power on and the device's
> PCI driver for suspend/resume.
>
> Rob
>

I admit that I don't have any HW where I could test it but I my thinking was
that with the following relationships between the devices:

                  ┌─────────────────────┐
                  │                     │
                  │   PCI Port device   │
                  │                     │
                  └───┬───────────┬─────┘
                      │           │
                      │           │
                      │           │
┌─────────────────────▼─────┐     │
│                           │     │
│   QCA6390 pwrseq device   │     │
│                           │     │
└─────────────────────┬─────┘     │
                      │           │
                      │           │
                      │           │
                ┌─────▼───────────▼───┐
                │                     │
                │  ath11k_pci device  │
                │                     │
                └─────────────────────┘

the PM subsystem would handle the dependencies automatically and correctly
setup the sequence for suspend and resume. Also: the PCI ath11k driver does
not deal with the kind of resources that the power sequencing platform driver
handles: regulators, GPIOs and clocks.

I agree, it would be useful to have a working case of handling suspend/resume
with this code though.

Bartosz