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Date: Sun, 21 Jan 2024 20:42:35 +0800
From: Ziyang Huang <hzyitc@...look.com>
To: mcoquelin.stm32@...il.com
Cc: alexandre.torgue@...s.st.com,
	richardcochran@...il.com,
	p.zabel@...gutronix.de,
	matthias.bgg@...il.com,
	angelogioacchino.delregno@...labora.com,
	linux-kernel@...r.kernel.org,
	linux-stm32@...md-mailman.stormreply.com,
	linux-arm-kernel@...ts.infradead.org,
	netdev@...r.kernel.org,
	linux-mediatek@...ts.infradead.org,
	Ziyang Huang <hzyitc@...look.com>
Subject: [PATCH 6/8] net: mdio: ipq4019: support reset control

Signed-off-by: Ziyang Huang <hzyitc@...look.com>
---
 drivers/net/mdio/mdio-ipq4019.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/net/mdio/mdio-ipq4019.c b/drivers/net/mdio/mdio-ipq4019.c
index 78b93de636f5..b52c5e1fb99b 100644
--- a/drivers/net/mdio/mdio-ipq4019.c
+++ b/drivers/net/mdio/mdio-ipq4019.c
@@ -12,6 +12,7 @@
 #include <linux/phy.h>
 #include <linux/platform_device.h>
 #include <linux/clk.h>
+#include <linux/reset.h>
 
 #define MDIO_MODE_REG				0x40
 #define MDIO_ADDR_REG				0x44
@@ -40,6 +41,7 @@
 struct ipq4019_mdio_data {
 	void __iomem	*membase;
 	void __iomem *eth_ldo_rdy;
+	struct reset_control *rst;
 	struct clk *mdio_clk;
 };
 
@@ -219,6 +221,10 @@ static int ipq_mdio_reset(struct mii_bus *bus)
 		fsleep(IPQ_PHY_SET_DELAY_US);
 	}
 
+	ret = reset_control_reset(priv->rst);
+	if (ret)
+		return ret;
+
 	/* Configure MDIO clock source frequency if clock is specified in the device tree */
 	ret = clk_set_rate(priv->mdio_clk, IPQ_MDIO_CLK_RATE);
 	if (ret)
@@ -248,6 +254,10 @@ static int ipq4019_mdio_probe(struct platform_device *pdev)
 	if (IS_ERR(priv->membase))
 		return PTR_ERR(priv->membase);
 
+	priv->rst = devm_reset_control_array_get_optional_exclusive(&pdev->dev);
+	if (IS_ERR(priv->rst))
+		return PTR_ERR(priv->rst);
+
 	priv->mdio_clk = devm_clk_get_optional(&pdev->dev, "gcc_mdio_ahb_clk");
 	if (IS_ERR(priv->mdio_clk))
 		return PTR_ERR(priv->mdio_clk);
-- 
2.40.1


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