netdev - Re: [PATCH net-next 02/20] dt-bindings: net: qcom,ppe: Add bindings yaml file

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Message-ID: <6fbfc205-fffa-42bd-8019-368559db77ac@lunn.ch>
Date: Mon, 22 Jan 2024 15:25:33 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Jie Luo <quic_luoj@...cinc.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>, agross@...nel.org,
	andersson@...nel.org, konrad.dybcio@...aro.org, davem@...emloft.net,
	edumazet@...gle.com, kuba@...nel.org, pabeni@...hat.com,
	robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
	conor+dt@...nel.org, corbet@....net, catalin.marinas@....com,
	will@...nel.org, p.zabel@...gutronix.de, linux@...linux.org.uk,
	shannon.nelson@....com, anthony.l.nguyen@...el.com,
	jasowang@...hat.com, brett.creeley@....com, rrameshbabu@...dia.com,
	joshua.a.hay@...el.com, arnd@...db.de, geert+renesas@...der.be,
	neil.armstrong@...aro.org, dmitry.baryshkov@...aro.org,
	nfraprado@...labora.com, m.szyprowski@...sung.com, u-kumar1@...com,
	jacob.e.keller@...el.com, netdev@...r.kernel.org,
	linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org, linux-doc@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, ryazanov.s.a@...il.com,
	ansuelsmth@...il.com, quic_kkumarcs@...cinc.com,
	quic_suruchia@...cinc.com, quic_soni@...cinc.com,
	quic_pavir@...cinc.com, quic_souravp@...cinc.com,
	quic_linchen@...cinc.com, quic_leiwei@...cinc.com
Subject: Re: [PATCH net-next 02/20] dt-bindings: net: qcom,ppe: Add bindings
 yaml file

> > > +++ b/Documentation/devicetree/bindings/net/qcom,ppe.yaml
> > > @@ -0,0 +1,1330 @@
> > > +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
> > > +%YAML 1.2
> > > +---
> > > +$id: http://devicetree.org/schemas/net/qcom,ppe.yaml#
> > > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > > +
> > > +title: Qualcomm Packet Process Engine Ethernet controller
> > 
> > Where is the ref to ethernet controllers schema?
> Sorry, the title above is not describing the device for this dtbindings
> correctly.  It should say "Qualcomm Packet Process Engine". The
> reference to the schema for PPE is mentioned above.

I think you are not correctly understanding the comment. within the
PPE you have a collection of Ethernet interfaces. All the common
properties for Ethernet ports are described in

Documentation/devicetree/bindings/net/ethernet-controller.yaml

so you are expected to reference this schema.

> > > +description:
> > > +  The PPE(packet process engine) is comprised of three componets, Ethernet
> > > +  DMA, Switch core and Port wrapper, Ethernet DMA is used to transmit and
> > > +  receive packets between Ethernet subsytem and host. The Switch core has
> > > +  maximum 8 ports(maximum 6 front panel ports and two FIFO interfaces),
> > > +  among which there are GMAC/XGMACs used as external interfaces and FIFO
> > > +  interfaces connected the EDMA/EIP, The port wrapper provides connections
> > > +  from the GMAC/XGMACS to SGMII/QSGMII/PSGMII/USXGMII/10G-BASER etc, there
> > > +  are maximu 3 UNIPHY(PCS) instances supported by PPE.

I think a big part of the problem here is, you have a flat
representation of the PPE. But device tree is very hierarchical. The
hardware itself is also probably very hierarchical. Please spend some
timer studying other DT descriptions of similar hardware. Then throw
away this vendor crap DT binding and start again from scratch, with a
hierarchical description of the hardware.

	Andrew