netdev - Re: [PATCH] net: phy: adin: add missing clock option

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Message-ID: <20240122-referable-unpainted-e17146ad8c7a@spud>
Date: Mon, 22 Jan 2024 17:38:41 +0000
From: Conor Dooley <conor@...nel.org>
To: Fabian Pfitzner <f.pfitzner@...gutronix.de>
Cc: Michael Hennerich <michael.hennerich@...log.com>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Rob Herring <robh+dt@...nel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
	Conor Dooley <conor+dt@...nel.org>, Andrew Lunn <andrew@...n.ch>,
	Heiner Kallweit <hkallweit1@...il.com>,
	Russell King <linux@...linux.org.uk>,
	Alexandru Tachici <alexandru.tachici@...log.com>,
	kernel@...gutronix.de, netdev@...r.kernel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] net: phy: adin: add missing clock option

On Mon, Jan 22, 2024 at 12:03:12PM +0100, Fabian Pfitzner wrote:
> The GP_CLK pin on Adin1300 PHY's offers three different output clocks.
> This patch adds the missing 125MHz recovered clock option which is not
> yet availible in the driver.
> 
> Signed-off-by: Fabian Pfitzner <f.pfitzner@...gutronix.de>
> ---
>  Documentation/devicetree/bindings/net/adi,adin.yaml | 7 +++++--

Binding patches should be split out from drivers please.

Thanks,
Conor.

>  drivers/net/phy/adin.c                              | 2 ++
>  2 files changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/net/adi,adin.yaml b/Documentation/devicetree/bindings/net/adi,adin.yaml
> index 929cf8c0b0fd..cd1b4efa692b 100644
> --- a/Documentation/devicetree/bindings/net/adi,adin.yaml
> +++ b/Documentation/devicetree/bindings/net/adi,adin.yaml
> @@ -38,14 +38,17 @@ properties:
>  
>    adi,phy-output-clock:
>      description: |
> -      Select clock output on GP_CLK pin. Two clocks are available:
> -      A 25MHz reference and a free-running 125MHz.
> +      Select clock output on GP_CLK pin. Three clocks are available:
> +        - 25MHz reference
> +        - free-running 125MHz 
> +        - recovered 125MHz
>        The phy can alternatively automatically switch between the reference and
>        the 125MHz clocks based on its internal state.
>      $ref: /schemas/types.yaml#/definitions/string
>      enum:
>        - 25mhz-reference
>        - 125mhz-free-running
> +      - 125mhz-recovered
>        - adaptive-free-running
>  
>    adi,phy-output-reference-clock:
> diff --git a/drivers/net/phy/adin.c b/drivers/net/phy/adin.c
> index 2e1a46e121d9..b1ed6fd24763 100644
> --- a/drivers/net/phy/adin.c
> +++ b/drivers/net/phy/adin.c
> @@ -508,6 +508,8 @@ static int adin_config_clk_out(struct phy_device *phydev)
>  		sel |= ADIN1300_GE_CLK_CFG_25;
>  	} else if (strcmp(val, "125mhz-free-running") == 0) {
>  		sel |= ADIN1300_GE_CLK_CFG_FREE_125;
> +	} else if (strcmp(val, "125mhz-recovered") == 0) {
> +		sel |= ADIN1300_GE_CLK_CFG_RCVR_125;
>  	} else if (strcmp(val, "adaptive-free-running") == 0) {
>  		sel |= ADIN1300_GE_CLK_CFG_HRT_FREE;
>  	} else {
> 
> base-commit: 6613476e225e090cc9aad49be7fa504e290dd33d
> -- 
> 2.39.2
> 

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