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Message-ID: <53445feb-a02c-4859-a993-ccf957208115@quicinc.com>
Date: Thu, 25 Jan 2024 13:57:20 +0800
From: Jie Luo <quic_luoj@...cinc.com>
To: Christian Marangi <ansuelsmth@...il.com>, Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio
	<konrad.dybcio@...aro.org>,
        "David S. Miller" <davem@...emloft.net>,
        Eric
 Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>,
        Paolo Abeni
	<pabeni@...hat.com>, Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski
	<krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>, Andrew Lunn <andrew@...n.ch>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Russell
 King <linux@...linux.org.uk>,
        Robert Marko <robert.marko@...tura.hr>,
        <linux-arm-msm@...r.kernel.org>, <netdev@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        Sergey Ryazanov
	<ryazanov.s.a@...il.com>
Subject: Re: [net-next PATCH 0/3] net: mdio-ipq4019: fix wrong default MDC
 rate



On 1/25/2024 5:36 AM, Christian Marangi wrote:
> This was a long journey to arrive and discover this problem.
> 
> To not waste too much char, there is a race problem with PHY and driver
> probe. This was observed with Aquantia PHY firmware loading.
> 
> With some hacks the race problem was workarounded but an interesting
> thing was notice. It took more than a minute for the firmware to load
> via MDIO.
> 
> This was strange as the same operation was done by UBoot in at max 5
> second and the same data was loaded.
> 
> A similar problem was observed on a mtk board that also had an
> Aquantia PHY where the load was very slow. It was notice that the cause
> was the MDIO bus running at a very low speed and the firmware
> was missing a property (present in mtk sdk) that set the right frequency
> to the MDIO bus.
> 
> It was fun to find that THE VERY SAME PROBLEM is present on IPQ in a
> different form. The MDIO apply internally a division to the feed clock
> resulting in the bus running at 390KHz instead of 6.25Mhz.
> 
> Searching around the web for some documentation and some include and
> analyzing the uboot codeflow resulted in the divider being set wrongly
> at /256 instead of /16 as the value was actually never set.
> Applying the value restore the original load time for the Aquantia PHY.
> 
> This series mainly handle this by adding support for the "clock-frequency"
> property.
> 
> Christian Marangi (3):
>    dt-bindings: net: ipq4019-mdio: document now supported clock-frequency
>    net: mdio: ipq4019: add support for clock-frequency property
>    arm64: dts: qcom: ipq8074: add clock-frequency to MDIO node
> 
>   .../bindings/net/qcom,ipq4019-mdio.yaml       | 10 +++
>   arch/arm64/boot/dts/qcom/ipq8074.dtsi         |  2 +
>   drivers/net/mdio/mdio-ipq4019.c               | 68 +++++++++++++++++--
>   3 files changed, 75 insertions(+), 5 deletions(-)
> 

Hi Christian,
Just a gentle reminder.

The MDIO frequency config is already added by the following patch series.
https://lore.kernel.org/netdev/28c8b31c-8dcb-4a19-9084-22c77a74b9a1@linaro.org/T/#m840cb8d269dca133c3ad3da3d112c63382ec2058

This MDIO patch series will be updated to just keep the MDIO frequency
patch and DT document for this MDIO frequency property added.

For CMN PLL config will be moved to the CMN PLL clock driver and the 
UNIPHY clock config will be moved the uniphy driver as suggested by
Sergey's suggestions.

Thanks.



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