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Message-Id: <20240130-rxc_bugfix-v2-7-5e6c3168e5f0@bootlin.com>
Date: Tue, 30 Jan 2024 10:28:42 +0100
From: Romain Gantois <romain.gantois@...tlin.com>
To: Russell King <linux@...linux.org.uk>, Andrew Lunn <andrew@...n.ch>,
Heiner Kallweit <hkallweit1@...il.com>,
"David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Jose Abreu <joabreu@...opsys.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Clément Léger <clement.leger@...tlin.com>
Cc: Maxime Chevallier <maxime.chevallier@...tlin.com>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>, netdev@...r.kernel.org,
linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org, linux-renesas-soc@...r.kernel.org,
Romain Gantois <romain.gantois@...tlin.com>
Subject: [PATCH net-next v2 7/7] net: pcs: rzn1-miic: Init RX clock early
if MAC requires it
The GMAC1 controller in the RZN1 IP requires the RX MII clock signal to be
started before it initializes its own hardware, thus before it calls
phylink_start.
Check the rxc_always_on pcs flag and enable the clock signal during the
link validation phase.
Reported-by: Clément Léger <clement.leger@...tlin.com>
Link: https://lore.kernel.org/linux-arm-kernel/20230116103926.276869-4-clement.leger@bootlin.com/
Signed-off-by: Romain Gantois <romain.gantois@...tlin.com>
---
drivers/net/pcs/pcs-rzn1-miic.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/net/pcs/pcs-rzn1-miic.c b/drivers/net/pcs/pcs-rzn1-miic.c
index d93f84fbb1fd..7ca10b7330ef 100644
--- a/drivers/net/pcs/pcs-rzn1-miic.c
+++ b/drivers/net/pcs/pcs-rzn1-miic.c
@@ -279,10 +279,26 @@ static int miic_validate(struct phylink_pcs *pcs, unsigned long *supported,
return -EINVAL;
}
+static int miic_pre_init(struct phylink_pcs *pcs,
+ phy_interface_t interface)
+{
+ int ret = 0;
+
+ /* Start RX clock if required */
+ if (pcs->rxc_always_on) {
+ ret = miic_config(pcs, 0, interface, NULL, false);
+ if (ret)
+ pr_err("Error: Failed to init RX clock in RZN1 MIIC PCS!");
+ }
+
+ return ret;
+}
+
static const struct phylink_pcs_ops miic_phylink_ops = {
.pcs_validate = miic_validate,
.pcs_config = miic_config,
.pcs_link_up = miic_link_up,
+ .pcs_pre_init = miic_pre_init,
};
struct phylink_pcs *miic_create(struct device *dev, struct device_node *np)
--
2.43.0
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