netdev - [PATCH net-next v4 6/7] net: dsa: mt7530: correct port capabilities of MT7988

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Date: Sun, 04 Feb 2024 19:34:24 +0300
From: Arınç ÜNAL via B4 Relay
 <devnull+arinc.unal.arinc9.com@...nel.org>
To: Daniel Golle <daniel@...rotopia.org>, DENG Qingfang <dqfext@...il.com>, 
 Sean Wang <sean.wang@...iatek.com>, Andrew Lunn <andrew@...n.ch>, 
 Florian Fainelli <f.fainelli@...il.com>, 
 Vladimir Oltean <olteanv@...il.com>, 
 "David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, 
 Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, 
 Matthias Brugger <matthias.bgg@...il.com>, 
 AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>, 
 Russell King <linux@...linux.org.uk>
Cc: mithat.guner@...ont.com, erkin.bozoglu@...ont.com, 
 Bartel Eerdekens <bartel.eerdekens@...stell8.be>, netdev@...r.kernel.org, 
 linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, 
 linux-mediatek@...ts.infradead.org, 
 Arınç ÜNAL <arinc.unal@...nc9.com>
Subject: [PATCH net-next v4 6/7] net: dsa: mt7530: correct port
 capabilities of MT7988

From: Arınç ÜNAL <arinc.unal@...nc9.com>

On the switch on the MT7988 SoC, as shown in Block Diagram 8.1.1.3 on page
125 of "MT7988A Wi-Fi 7 Generation Router Platform: Datasheet (Open
Version) v0.1", there are only 4 PHYs. That's port 0 to 3. Set the case for
ports which connect to switch PHYs to '0 ... 3'.

Port 4 and 5 are not used at all in this design.

Link: https://wiki.banana-pi.org/Banana_Pi_BPI-R4#Documents [1]
Acked-by: Daniel Golle <daniel@...rotopia.org>
Reviewed-by: Vladimir Oltean <olteanv@...il.com>
Signed-off-by: Arınç ÜNAL <arinc.unal@...nc9.com>
---
 drivers/net/dsa/mt7530.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
index 8a6312b3bb06..08d5d7dd5969 100644
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2577,7 +2577,7 @@ static void mt7988_mac_port_get_caps(struct dsa_switch *ds, int port,

 	switch (port) {
 	/* Ports which are connected to switch PHYs. There is no MII pinout. */
-	case 0 ... 4:
+	case 0 ... 3:
 		__set_bit(PHY_INTERFACE_MODE_INTERNAL,
 			  config->supported_interfaces);
 		break;

-- 
2.40.1