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Message-ID: <20240205133545.GL960600@kernel.org>
Date: Mon, 5 Feb 2024 13:35:45 +0000
From: Simon Horman <horms@...nel.org>
To: Louis Peens <louis.peens@...igine.com>
Cc: David Miller <davem@...emloft.net>, Jakub Kicinski <kuba@...nel.org>,
	Paolo Abeni <pabeni@...hat.com>,
	James Hershaw <james.hershaw@...igine.com>,
	Daniel Basilio <daniel.basilio@...igine.com>,
	netdev@...r.kernel.org, stable@...r.kernel.org,
	oss-drivers@...igine.com
Subject: Re: [PATCH net 1/3] nfp: use correct macro for LengthSelect in BAR
 config

On Fri, Feb 02, 2024 at 01:37:17PM +0200, Louis Peens wrote:
> From: Daniel Basilio <daniel.basilio@...igine.com>
> 
> The 1st and 2nd expansion BAR configuration registers are configured,
> when the driver starts up, in variables 'barcfg_msix_general' and
> 'barcfg_msix_xpb', respectively. The 'LengthSelect' field is ORed in
> from bit 0, which is incorrect. The 'LengthSelect' field should
> start from bit 27.
> 
> This has largely gone un-noticed because
> NFP_PCIE_BAR_PCIE2CPP_LengthSelect_32BIT happens to be 0.
> 
> Fixes: 4cb584e0ee7d ("nfp: add CPP access core")
> Cc: stable@...r.kernel.org # 4.11+
> Signed-off-by: Daniel Basilio <daniel.basilio@...igine.com>
> Signed-off-by: Louis Peens <louis.peens@...igine.com>

Hi Daniel and Louis,

If I'm reading this right then this is a code-correctness issue
and there is no runtime effect (because 0 is 0 regardless of shifting and
masking).

If so, I'd suggest that this is net-next material.
And, in turn, if so the Fixes tag should be dropped.

> ---
>  drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c b/drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c
> index 33b4c2856316..3f10c5365c80 100644
> --- a/drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c
> +++ b/drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c
> @@ -537,11 +537,13 @@ static int enable_bars(struct nfp6000_pcie *nfp, u16 interface)
>  	const u32 barcfg_msix_general =
>  		NFP_PCIE_BAR_PCIE2CPP_MapType(
>  			NFP_PCIE_BAR_PCIE2CPP_MapType_GENERAL) |
> -		NFP_PCIE_BAR_PCIE2CPP_LengthSelect_32BIT;
> +		NFP_PCIE_BAR_PCIE2CPP_LengthSelect(
> +			NFP_PCIE_BAR_PCIE2CPP_LengthSelect_32BIT);
>  	const u32 barcfg_msix_xpb =
>  		NFP_PCIE_BAR_PCIE2CPP_MapType(
>  			NFP_PCIE_BAR_PCIE2CPP_MapType_BULK) |
> -		NFP_PCIE_BAR_PCIE2CPP_LengthSelect_32BIT |
> +		NFP_PCIE_BAR_PCIE2CPP_LengthSelect(
> +			NFP_PCIE_BAR_PCIE2CPP_LengthSelect_32BIT) |
>  		NFP_PCIE_BAR_PCIE2CPP_Target_BaseAddress(
>  			NFP_CPP_TARGET_ISLAND_XPB);
>  	const u32 barcfg_explicit[4] = {
> -- 
> 2.34.1
> 
> 

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