netdev - Re: [PATCH] net: txgbe: fix GPIO interrupt blocking

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Message-ID: <9259e4eb-8744-45cf-bdea-63bc376983a4@lunn.ch>
Date: Tue, 6 Feb 2024 16:29:11 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Jiawen Wu <jiawenwu@...stnetic.com>
Cc: davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
	pabeni@...hat.com, maciej.fijalkowski@...el.com,
	netdev@...r.kernel.org, mengyuanlou@...-swift.com
Subject: Re: [PATCH] net: txgbe: fix GPIO interrupt blocking

On Tue, Feb 06, 2024 at 03:08:24PM +0800, Jiawen Wu wrote:
> GPIO interrupt is generated before MAC IRQ is enabled, it causes
> subsequent GPIO interrupts that can no longer be reported if it is
> not cleared in time. So clear GPIO interrupt status at the right
> time.

This does not sound correct. Since this is an interrupt controller, it
is a level interrupt. If its not cleared, as soon as the parent
interrupt is re-enabled, is should cause another interrupt at the
parent level. Servicing that interrupt, should case a descent to the
child, which will service the interrupt, and atomically clear the
interrupt status.

Is something wrong here, like you are using edge interrupts, not
level?

> And executing function txgbe_gpio_irq_ack() manually since
> handle_nested_irq() does not call .irq_ack for irq_chip.

I don't know the interrupt code too well, so could you explain this in
more detail. Your explanation sounds odd to me.

What is the big picture problem here? Do you have the PHY interrupt
connected to a GPIO and you are loosing PHY interrupts?

	Andrew