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Message-ID: <63d59bff272f572c94f97000475c4ac3e157c013.camel@redhat.com>
Date: Thu, 08 Feb 2024 11:12:28 +0100
From: Paolo Abeni <pabeni@...hat.com>
To: Tim Pambor <tp@...systeme.de>, Andrew Lunn <andrew@...n.ch>
Cc: Heiner Kallweit <hkallweit1@...il.com>, Russell King
<linux@...linux.org.uk>, "David S. Miller" <davem@...emloft.net>, Eric
Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, Dan Murphy
<dmurphy@...com>, netdev@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] net: phy: dp83822: Fix RGMII TX delay configuration
On Sun, 2024-02-04 at 11:11 +0100, Tim Pambor wrote:
> The logic for enabling the TX clock shift is inverse of enabling the RX
> clock shift. The TX clock shift is disabled when DP83822_TX_CLK_SHIFT is
> set. Correct the current behavior and always write the delay configuration
> to ensure consistent delay settings regardless of bootloader configuration.
>
> Reference: https://www.ti.com/lit/ds/symlink/dp83822i.pdf p. 69
>
> Fixes: 8095295292b5 ("net: phy: DP83822: Add setting the fixed internal delay")
> Signed-off-by: Tim Pambor <tp@...systeme.de>
> ---
> Changes in v2:
> - Further cleanup of RGMII configuration
This overall makes the change more invasive, I'm unsure is in the
direction pointed by Russell
> - Check for errors setting DP83822_RGMII_MODE_EN
> ---
> drivers/net/phy/dp83822.c | 41 +++++++++++++--------------------------
> 1 file changed, 14 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/net/phy/dp83822.c b/drivers/net/phy/dp83822.c
> index b7cb71817780..1b2c34a97396 100644
> --- a/drivers/net/phy/dp83822.c
> +++ b/drivers/net/phy/dp83822.c
> @@ -380,42 +380,29 @@ static int dp83822_config_init(struct phy_device *phydev)
> {
> struct dp83822_private *dp83822 = phydev->priv;
> struct device *dev = &phydev->mdio.dev;
> - int rgmii_delay;
> - s32 rx_int_delay;
> - s32 tx_int_delay;
> + int rcsr_mask = DP83822_RGMII_MODE_EN;
> + int rcsr = 0;
> int err = 0;
> int bmcr;
>
> if (phy_interface_is_rgmii(phydev)) {
> - rx_int_delay = phy_get_internal_delay(phydev, dev, NULL, 0,
> - true);
> + rcsr |= DP83822_RGMII_MODE_EN;
>
> - if (rx_int_delay <= 0)
> - rgmii_delay = 0;
> - else
> - rgmii_delay = DP83822_RX_CLK_SHIFT;
> + /* Set DP83822_RX_CLK_SHIFT to enable rx clk internal delay */
> + if (phy_get_internal_delay(phydev, dev, NULL, 0, true) > 0)
> + rcsr |= DP83822_RX_CLK_SHIFT;
>
> - tx_int_delay = phy_get_internal_delay(phydev, dev, NULL, 0,
> - false);
> - if (tx_int_delay <= 0)
> - rgmii_delay &= ~DP83822_TX_CLK_SHIFT;
> - else
> - rgmii_delay |= DP83822_TX_CLK_SHIFT;
> + /* Set DP83822_TX_CLK_SHIFT to disable tx clk internal delay */
> + if (phy_get_internal_delay(phydev, dev, NULL, 0, false) <= 0)
> + rcsr |= DP83822_TX_CLK_SHIFT;
>
> - if (rgmii_delay) {
> - err = phy_set_bits_mmd(phydev, DP83822_DEVADDR,
> - MII_DP83822_RCSR, rgmii_delay);
> - if (err)
> - return err;
> - }
> -
> - phy_set_bits_mmd(phydev, DP83822_DEVADDR,
> - MII_DP83822_RCSR, DP83822_RGMII_MODE_EN);
> - } else {
> - phy_clear_bits_mmd(phydev, DP83822_DEVADDR,
> - MII_DP83822_RCSR, DP83822_RGMII_MODE_EN);
> + rcsr_mask |= DP83822_RX_CLK_SHIFT | DP83822_TX_CLK_SHIFT;
It looks like there is a change of behavior here. The current code
clear the DP83822_RGMII_MODE_EN, while this patch will clear
DP83822_RX_CLK_SHIFT | DP83822_TX_CLK_SHIFT, leaving
DP83822_RGMII_MODE_EN unmodified.
It does not look correct to me.
Cheers,
Paolo
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