netdev - Re: [PATCH v2 2/2] net: phy: dp83826: support TX data voltage tuning

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Date: Thu, 8 Feb 2024 08:58:08 +0000
From: POPESCU Catalin <catalin.popescu@...ca-geosystems.com>
To: Andrew Lunn <andrew@...n.ch>
CC: "davem@...emloft.net" <davem@...emloft.net>, "kuba@...nel.org"
	<kuba@...nel.org>, "pabeni@...hat.com" <pabeni@...hat.com>,
	"robh+dt@...nel.org" <robh+dt@...nel.org>,
	"krzysztof.kozlowski+dt@...aro.org" <krzysztof.kozlowski+dt@...aro.org>,
	"conor+dt@...nel.org" <conor+dt@...nel.org>, "afd@...com" <afd@...com>,
	"hkallweit1@...il.com" <hkallweit1@...il.com>, "linux@...linux.org.uk"
	<linux@...linux.org.uk>, "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	GEO-CHHER-bsp-development <bsp-development.geo@...ca-geosystems.com>,
	"m.felsch@...gutronix.de" <m.felsch@...gutronix.de>
Subject: Re: [PATCH v2 2/2] net: phy: dp83826: support TX data voltage tuning

On 07.02.24 19:35, Andrew Lunn wrote:
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>> +static int dp83826_config_init(struct phy_device *phydev)
>> +{
>> +     struct dp83822_private *dp83822 = phydev->priv;
>> +     u16 val, mask;
>> +     int ret;
>> +
>> +     if (dp83822->cfg_dac_minus != DP83826_CFG_DAC_MINUS_DEFAULT) {
>> +             val = FIELD_PREP(DP83826_VOD_CFG1_MINUS_MDI_MASK, dp83822->cfg_dac_minus) |
>> +                   FIELD_PREP(DP83826_VOD_CFG1_MINUS_MDIX_MASK,
>> +                              FIELD_GET(DP83826_CFG_DAC_MINUS_MDIX_5_TO_4,
>> +                                        dp83822->cfg_dac_minus));
>> +             mask = DP83826_VOD_CFG1_MINUS_MDIX_MASK | DP83826_VOD_CFG1_MINUS_MDI_MASK;
>> +             ret = phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83826_VOD_CFG1, mask, val);
>> +             if (ret)
>> +                     return ret;
>> +
>> +             val = FIELD_PREP(DP83826_VOD_CFG2_MINUS_MDIX_MASK,
>> +                              FIELD_GET(DP83826_CFG_DAC_MINUS_MDIX_3_TO_0,
>> +                                        dp83822->cfg_dac_minus));
>> +             mask = DP83826_VOD_CFG2_MINUS_MDIX_MASK;
>> +             ret = phy_modify_mmd(phydev, DP83822_DEVADDR, MII_DP83826_VOD_CFG2, mask, val);
>> +             if (ret)
>> +                     return ret;
>> +     }
> I could be reading this wrong, but it looks like
> DP83826_CFG_DAC_MINUS_DEFAULT actually means leave the value
> unchanged? Is there anything guaranteeing it does in fact have the
> default value in the hardware?
>
>          Andrew

Yes, the datasheet clearly states the default/reset values of both 
registers VOD_CFG1 & VOD_CFG2 which are :
- cfg_dac_minus : 30h
- cfg_dac_plus : 10h