netdev - Re: [PATCH] net: ipa: don't overrun IPA suspend interrupt registers

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Message-ID: <20240219194433.GN40273@kernel.org>
Date: Mon, 19 Feb 2024 19:44:33 +0000
From: Simon Horman <horms@...nel.org>
To: Alex Elder <elder@...aro.org>
Cc: davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
	pabeni@...hat.com, mka@...omium.org, andersson@...nel.org,
	quic_cpratapa@...cinc.com, quic_avuyyuru@...cinc.com,
	quic_jponduru@...cinc.com, quic_subashab@...cinc.com,
	elder@...nel.org, netdev@...r.kernel.org,
	linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] net: ipa: don't overrun IPA suspend interrupt registers

On Sun, Feb 18, 2024 at 01:04:50PM -0600, Alex Elder wrote:
> In newer hardware, IPA supports more than 32 endpoints.  Some
> registers--such as IPA interrupt registers--represent endpoints
> as bits in a 4-byte register, and such registers are repeated as
> needed to represent endpoints beyond the first 32.
> 
> In ipa_interrupt_suspend_clear_all(), we clear all pending IPA
> suspend interrupts by reading all status register(s) and writing
> corresponding registers to clear interrupt conditions.
> 
> Unfortunately the number of registers to read/write is calculated
> incorrectly, and as a result we access *many* more registers than
> intended.  This bug occurs only when the IPA hardware signals a
> SUSPEND interrupt, which happens when a packet is received for an
> endpoint (or its underlying GSI channel) that is suspended.  This
> situation is difficult to reproduce, but possible.

I see what you mean about *many* more :)

> Fix this by correctly computing the number of interrupt registers to
> read and write.  This is the only place in the code where registers
> that map endpoints or channels this way perform this calculation.
> 
> Fixes: f298ba785e2d ("net: ipa: add a parameter to suspend registers")
> Signed-off-by: Alex Elder <elder@...aro.org>

As noted by Alex elsewhere elsewhere in this thread, this is for net.

Reviewed-by: Simon Horman <horms@...nel.org>