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Message-ID:
 <SEZPR06MB695964E1A34936F70470A21996512@SEZPR06MB6959.apcprd06.prod.outlook.com>
Date: Tue, 20 Feb 2024 04:42:25 +0800
From: Yang Xiwen <forbidden405@...look.com>
To: Andrew Lunn <andrew@...n.ch>
Cc: Yisen Zhuang <yisen.zhuang@...wei.com>,
 Salil Mehta <salil.mehta@...wei.com>, "David S. Miller"
 <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
 Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
 Rob Herring <robh+dt@...nel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
 Conor Dooley <conor+dt@...nel.org>, Heiner Kallweit <hkallweit1@...il.com>,
 Russell King <linux@...linux.org.uk>, netdev@...r.kernel.org,
 linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH net-next v3 3/6] net: hisilicon: add support for
 hisi_femac core on Hi3798MV200

On 2/20/2024 4:03 AM, Andrew Lunn wrote:
>> Note it's unable to put the MDIO bus node outside of MAC controller
>> (i.e. at the same level in the parent bus node). Because we need to
>> control all clocks and resets in FEMAC driver due to the phy reset
>> procedure. So the clocks can't be assigned to MDIO bus device, which is
>> an essential resource for the MDIO bus to work.
> What PHY driver is being used? If there a specific PHY driver for this
> hardware? Does it implement soft reset?
>
> I'm wondering if you can skip hardware reset of the PHY and only do a
> software reset.

Can we ask ethernet PHY framework to notify us (the MAC driver) when it 
is going to do the hardware reset? In that way we can add clock 
disabling/enabling code to the callback and let the PHY framework do the 
reset procedure. In this way, we can benefit a lot from PHY framework. 
E.g. make use of dt props like `reset-(de)assert-us`, rather than 
encoding these value in the MAC driver with a custom vendor property.

>
> 	Andrew


-- 
Regards,
Yang Xiwen


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