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Message-ID: <ZdhdMl-EWXTGzx1p@pengutronix.de>
Date: Fri, 23 Feb 2024 09:54:10 +0100
From: Oleksij Rempel <o.rempel@...gutronix.de>
To: Florian Fainelli <f.fainelli@...il.com>
Cc: Wei Fang <wei.fang@....com>, "David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Andrew Lunn <andrew@...n.ch>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>, kernel@...gutronix.de,
linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
Shenwei Wang <shenwei.wang@....com>,
Clark Wang <xiaoning.wang@....com>,
NXP Linux Team <linux-imx@....com>
Subject: Re: [PATCH net-next v5 3/8] net: phy: Add helper to set EEE Clock
stop enable bit
On Thu, Feb 22, 2024 at 08:47:58PM -0800, Florian Fainelli wrote:
>
>
> On 2/20/2024 10:21 PM, Oleksij Rempel wrote:
> > From: Andrew Lunn <andrew@...n.ch>
> >
> > The MAC driver can request that the PHY stops the clock during EEE
> > LPI. This has normally been does as part of phy_init_eee(), however
> > that function is overly complex and often wrongly used. Add a
> > standalone helper, to aid removing phy_init_eee().
> >
> > Signed-off-by: Andrew Lunn <andrew@...n.ch>
> > Signed-off-by: Oleksij Rempel <o.rempel@...gutronix.de>
>
> Reviewed-by: Florian Fainelli <florian.fainelli@...adcom.com>
>
> It would be useful to also read whether the PHY is capable of stopping its
> clock, this has IMHO always been missing. Clause 45 IEEE PCS Status 1
> Register (3.1) bit 6 reflects whether the PHY is capable of stopping its
> clock.
Agreed, there is a extra set of challenges with this functionality. For
example stmmac will fail to reset DMA engine if PHY disabled clock. It will be
good to handle it in a separate patch set.
Regards,
Oleksij
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