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Message-ID: <ZeCyAGiZZAFbVxAi@makrotopia.org>
Date: Thu, 29 Feb 2024 16:34:08 +0000
From: Daniel Golle <daniel@...rotopia.org>
To: Marek BehĂșn <kabel@...nel.org>
Cc: "Russell King (Oracle)" <linux@...linux.org.uk>,
Eric Woudstra <ericwouds@...il.com>, Andrew Lunn <andrew@...n.ch>,
Heiner Kallweit <hkallweit1@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Frank Wunderlich <frank-w@...lic-files.de>, netdev@...r.kernel.org,
Alexander Couzens <lynxis@...0.eu>
Subject: Re: [PATCH RFC net-next 1/6] net: phy: realtek: configure SerDes
mode for rtl822x/8251b PHYs
On Thu, Feb 29, 2024 at 01:50:10PM +0100, Marek BehĂșn wrote:
> On Tue, 27 Feb 2024 10:36:05 +0000
> "Russell King (Oracle)" <linux@...linux.org.uk> wrote:
>
> > > + ret = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x75f3, 0);
> > > + if (ret < 0)
> > > + return ret;
> >
> > It would be nice to know what this is doing.
>
> No documentation for this from Realtek, I guess this was just taken
> from SDK originally.
There is an additional datasheet for RTL8226B/RTL8221B called
"SERDES MODE SETTING FLOW APPLICATION NOTE" where this sequence to
setup interface and rate adapter mode, and also the sequence to
disable (H)SGMII in-band-status are described.
However, there is no documentation about the meaning of registers
and bits, it's literally just magic numbers and pseudo-code.
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