netdev - Re: [PATCH net-next v3 01/12] Documentation: networking: add OPEN Alliance 10BASE-T1x MAC-PHY serial interface

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <a9c8a5b1-866e-4ade-ad07-af715042ec9c@lunn.ch>
Date: Wed, 6 Mar 2024 14:23:09 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Parthiban Veerasooran <Parthiban.Veerasooran@...rochip.com>
Cc: davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
	pabeni@...hat.com, horms@...nel.org, saeedm@...dia.com,
	anthony.l.nguyen@...el.com, netdev@...r.kernel.org,
	linux-kernel@...r.kernel.org, corbet@....net,
	linux-doc@...r.kernel.org, robh+dt@...nel.org,
	krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
	devicetree@...r.kernel.org, horatiu.vultur@...rochip.com,
	ruanjinjie@...wei.com, steen.hegelund@...rochip.com,
	vladimir.oltean@....com, UNGLinuxDriver@...rochip.com,
	Thorsten.Kummermehr@...rochip.com, Pier.Beruto@...emi.com,
	Selvamani.Rajagopal@...emi.com, Nicolas.Ferre@...rochip.com,
	benjamin.bigler@...nformulastudent.ch
Subject: Re: [PATCH net-next v3 01/12] Documentation: networking: add OPEN
 Alliance 10BASE-T1x MAC-PHY serial interface

> +NORX (Bit 29) - No Receive flag. The SPI host may set this bit to prevent
> +                the MAC-PHY from conveying RX data on the MISO for the
> +		current chunk (DV = 0 in the footer), indicating that the
> +		host would not process it. Typically, the SPI host should
> +		set NORX = 0 indicating that it will accept and process
> +		any receive frame data within the current chunk.
> +
> +RSVD (Bit 28..24) - Reserved: All reserved bits shall be ‘0’.
> +
> +VS (Bit 23..22) - Vendor Specific. These bits are implementation specific.
> +                  If the MAC-PHY does not implement these bits, the host
> +		  shall set them to ‘0’.
> +
> +DV (Bit 21) - Data Valid flag. The SPI host uses this bit to indicate
> +              whether the current chunk contains valid transmit frame data
> +	      (DV = 1) or not (DV = 0). When ‘0’, the MAC-PHY ignores the
> +	      chunk payload. Note that the receive path is unaffected by
> +	      the setting of the DV bit in the data header.

There is some odd indentation going on here. Maybe tab vs spaces?

Otherwise, this is nice documentation. Thanks.

	Andrew