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Message-ID: <9e48f3a1-08cd-4af4-86ee-8ab352352bf7@microchip.com>
Date: Thu, 7 Mar 2024 06:29:30 +0000
From: <Parthiban.Veerasooran@...rochip.com>
To: <andrew@...n.ch>
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Subject: Re: [PATCH net-next v3 01/12] Documentation: networking: add OPEN
Alliance 10BASE-T1x MAC-PHY serial interface
Hi Andrew,
Thanks for reviewing the patches.
On 06/03/24 6:53 pm, Andrew Lunn wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
>> +NORX (Bit 29) - No Receive flag. The SPI host may set this bit to prevent
>> + the MAC-PHY from conveying RX data on the MISO for the
>> + current chunk (DV = 0 in the footer), indicating that the
>> + host would not process it. Typically, the SPI host should
>> + set NORX = 0 indicating that it will accept and process
>> + any receive frame data within the current chunk.
>> +
>> +RSVD (Bit 28..24) - Reserved: All reserved bits shall be ‘0’.
>> +
>> +VS (Bit 23..22) - Vendor Specific. These bits are implementation specific.
>> + If the MAC-PHY does not implement these bits, the host
>> + shall set them to ‘0’.
>> +
>> +DV (Bit 21) - Data Valid flag. The SPI host uses this bit to indicate
>> + whether the current chunk contains valid transmit frame data
>> + (DV = 1) or not (DV = 0). When ‘0’, the MAC-PHY ignores the
>> + chunk payload. Note that the receive path is unaffected by
>> + the setting of the DV bit in the data header.
>
> There is some odd indentation going on here. Maybe tab vs spaces?
Yes, there is a mixture of tab and spaces. I will correct this
indentation in the next version.
>
> Otherwise, this is nice documentation. Thanks.
Thanks.
Best regards,
Parthiban V
>
> Andrew
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