netdev - Re: Energy Efficient Ethernet on MT7531 switch

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Date: Thu, 14 Mar 2024 18:01:58 +0100
From: Heiner Kallweit <hkallweit1@...il.com>
To: Daniel Golle <daniel@...rotopia.org>, Arınç ÜNAL
 <arinc.unal@...nc9.com>
Cc: Frank Wunderlich <frank-w@...lic-files.de>,
 netdev <netdev@...r.kernel.org>
Subject: Re: Energy Efficient Ethernet on MT7531 switch

On 14.03.2024 15:58, Daniel Golle wrote:
> Hi,
> 
> On Thu, Mar 14, 2024 at 03:57:09PM +0300, Arınç ÜNAL wrote:
>> Hi Frank.
>>
>> Do you have a board with an external PHY that supports EEE connected to an
>> MT7531 switch?
> 
> Good to hear you are working on supporting EEE -- something which has
> been neglected for too long imho.
> 
> I got a bunch of such boards, all of them with different generations
> of RealTek RTL8226 or RTL8221 2.5G PHY which in theory supports EEE
> but the PHY driver in Linux at this point does not support EEE.
> 

With linux-next / net-next also 2.5G EEE should be configurable for these
PHY's. Or what are you missing in the Realtek PHY driver?

> However, as one of the SFP cages of the BPi-R3 is connected to the on-board
> MT7531 switch port 5 this would provide the option to basically test EEE
> with practically every PHY you could find inside an RJ-45 SFP module
> (spoiler: you will mostly find Marvell 88E1111, and I don't see support for
> EEE in neither the datasheet nor the responsible sub-driver in Linux).
> 
> So looks like we will have to implement support for EEE for either
> RealTek's RTL8221B or the built-in PHYs of any of the MT753x, MT7621
> or MT7988 switch first.
> 
>> I've stumbled across an option on the trap register of
>> MT7531 that claims that EEE is disabled switch-wide by default after reset.
>>
>> I'm specifically asking for an external PHY because the MT7531 switch PHYs
>> don't support EEE yet. But the MT753X DSA subdriver claims to support EEE,
>> so the remaining option is external PHYs.
>>
>> It'd be great if you can test with and without this diff [1] and see if you
>> see EEE supported on ethtool on a computer connected to the external PHY.
>>
>> Example output on the computer side:
>>
>> $ sudo ethtool --show-eee eno1
>> EEE settings for eno1:
>> 	EEE status: enabled - active
>> 	Tx LPI: 17 (us)
>> 	Supported EEE link modes:  100baseT/Full
>> 	                           1000baseT/Full
>> 	Advertised EEE link modes:  100baseT/Full
>> 	                            1000baseT/Full
>> 	Link partner advertised EEE link modes:  100baseT/Full
>> 	                                         1000baseT/Full
>>
>> I'm also CC'ing Daniel and the netdev mailing list, if someone else would
>> like to chime in.
>>
>> [1]
>> diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
>> index b347d8ab2541..4ef3948d310d 100644
>> --- a/drivers/net/dsa/mt7530.c
>> +++ b/drivers/net/dsa/mt7530.c
>> @@ -2499,6 +2499,8 @@ mt7531_setup(struct dsa_switch *ds)
>>  	mt7531_ind_c45_phy_write(priv, MT753X_CTRL_PHY_ADDR, MDIO_MMD_VEND2,
>>  				 CORE_PLL_GROUP4, val);
>> +	mt7530_rmw(priv, MT7530_MHWTRAP, CHG_STRAP | EEE_DIS, CHG_STRAP);
>> +
>>  	mt7531_setup_common(ds);
>>  	/* Setup VLAN ID 0 for VLAN-unaware bridges */
>> diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h
>> index 3c3e7ae0e09b..1b3e81f6c90e 100644
>> --- a/drivers/net/dsa/mt7530.h
>> +++ b/drivers/net/dsa/mt7530.h
>> @@ -299,11 +299,15 @@ enum mt7530_vlan_port_acc_frm {
>>  #define  MT7531_FORCE_DPX		BIT(29)
>>  #define  MT7531_FORCE_RX_FC		BIT(28)
>>  #define  MT7531_FORCE_TX_FC		BIT(27)
>> +#define  MT7531_FORCE_EEE100		BIT(26)
>> +#define  MT7531_FORCE_EEE1G		BIT(25)
>>  #define  MT7531_FORCE_MODE		(MT7531_FORCE_LNK | \
>>  					 MT7531_FORCE_SPD | \
>>  					 MT7531_FORCE_DPX | \
>>  					 MT7531_FORCE_RX_FC | \
>> -					 MT7531_FORCE_TX_FC)
>> +					 MT7531_FORCE_TX_FC | \
>> +					 MT7531_FORCE_EEE100 | \
>> +					 MT7531_FORCE_EEE1G)
>>  #define  PMCR_LINK_SETTINGS_MASK	(PMCR_TX_EN | PMCR_FORCE_SPEED_1000 | \
>>  					 PMCR_RX_EN | PMCR_FORCE_SPEED_100 | \
>>  					 PMCR_TX_FC_EN | PMCR_RX_FC_EN | \
>> @@ -457,6 +461,7 @@ enum mt7531_clk_skew {
>>  #define  XTAL_FSEL_M			BIT(7)
>>  #define  PHY_EN				BIT(6)
>>  #define  CHG_STRAP			BIT(8)
>> +#define  EEE_DIS			BIT(4)
>>  /* Register for hw trap modification */
>>  #define MT7530_MHWTRAP			0x7804
>>
>> Thanks a lot!
>> Arınç
>>
>