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Message-ID: <e57a6501-c9ae-4fed-8b8f-b05f0d50e118@loongson.cn>
Date: Fri, 22 Mar 2024 18:36:20 +0800
From: Yanteng Si <siyanteng@...ngson.cn>
To: Serge Semin <fancer.lancer@...il.com>
Cc: hkallweit1@...il.com, andrew@...n.ch, peppe.cavallaro@...com,
 alexandre.torgue@...s.st.com, joabreu@...opsys.com, Jose.Abreu@...opsys.com,
 chenhuacai@...ngson.cn, linux@...linux.org.uk, guyinggang@...ngson.cn,
 netdev@...r.kernel.org, chris.chenfeiyang@...il.com
Subject: Re: [PATCH net-next v8 07/11] net: stmmac: dwmac-loongson: Add
 multi-channel supports for loongson

>>>>> +{
>>>>> +	int i, ret, vecs;
>>>>> +
>>>>> +	vecs = roundup_pow_of_two(channel_num * 2 + 1);
>>>>> +	ret = pci_alloc_irq_vectors(pdev, vecs, vecs, PCI_IRQ_MSI);
>>>>> +	if (ret < 0) {
>>>>> +		dev_info(&pdev->dev,
>>>>> +			 "MSI enable failed, Fallback to legacy interrupt\n");
>>>>> +		return loongson_dwmac_config_legacy(pdev, plat, res, np);
>>>> In what conditions is this possible? Will the
>>>> loongson_dwmac_config_legacy() method work in that case? Did you test
>>>> it out?
I need to wait for special hardware and PMON for this.  Please give me 
some time.

> Then those platforms will _require_ to have the DT-node specified. This
> will define the DT-bindings which I doubt you imply here. Am I wrong?
>
> Once again have you tested the loongson_dwmac_config_legacy() method
> working in the case of the pci_alloc_irq_vectors() failure?

Yes!  I have tested it, it works in single channel mode.

dmesg:

[    3.935203] mdio_bus stmmac-18:02: attached PHY driver [unbound]
(mii_bus:phy_addr=stmmac-18:02, irq=POLL)
[    3.945625] dwmac-loongson-pci 0000:00:03.1: MSI enable failed, Fallback to
legacy interrupt
[    3.954175] dwmac-loongson-pci 0000:00:03.1: User ID: 0xd1, Synopsys ID: 0x10
[    3.973676] dwmac-loongson-pci 0000:00:03.1: DMA HW capability register supported
[    3.981135] dwmac-loongson-pci 0000:00:03.1: RX Checksum Offload Engine supported

cat /proc/interrupt:

43:          0          0   PCH PIC  16  ahci[0000:00:08.0]
   44:          0          0   PCH PIC  12  enp0s3f0
   45:          0          0   PCH PIC  14  enp0s3f1
   46:      16233          0   PCH PIC  17  enp0s3f2
   47:      12698          0   PCH PIC  48  xhci-hcd:usb1


the irq number 46 is the falkback legacy irq.

> 	
>
>>>>> +	}
>>>>> +
>>>>> +	plat->rx_queues_to_use = channel_num;
>>>>> +	plat->tx_queues_to_use = channel_num;
>>>> This is supposed to be initialized in the setup() methods. Please move
>>>> it to the dedicated patch.
>>> No, referring to my previous reply, only the 0x10 gnet device has 8 channels,
>>> and the 0x37 device has a single channel.
> Yes. You have a perfectly suitable method for it. It's
> loongson_gnet_data(). Init the number of channels there based on the
> value read from the GMAC_VERSION.SNPSVER field. Thus the
> loongson_gnet_config_multi_msi() will get to be more coherent setting
> up the MSI IRQs only.
You are right!  it works well.


Thanks,

Yanteng



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