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Message-ID: <mhng-170f61cd-c3b7-413b-8279-9d50d55dbebe@palmer-ri-x1c9>
Date: Wed, 03 Apr 2024 11:22:04 -0700 (PDT)
From: Palmer Dabbelt <palmer@...belt.com>
To: Conor Dooley <conor@...nel.org>
CC: linux-riscv@...ts.infradead.org, Conor Dooley <conor@...nel.org>,
  Conor Dooley <conor.dooley@...rochip.com>, Paul Walmsley <paul.walmsley@...ive.com>, aou@...s.berkeley.edu,
  linux-kernel@...r.kernel.org, brendan.higgins@...ux.dev, davidgow@...gle.com, rmoar@...gle.com,
  Jason@...c4.com, shuah@...nel.org, linux-kselftest@...r.kernel.org, kunit-dev@...glegroups.com,
  wireguard@...ts.zx2c4.com, netdev@...r.kernel.org
Subject:     Re: [PATCH v1 2/2] RISC-V: drop SOC_VIRT for ARCH_VIRT

On Tue, 05 Mar 2024 10:37:06 PST (-0800), Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@...rochip.com>
>
> The ARCH_ and SOC_ versions of this symbol have persisted for quite a
> while now in parallel. Generated .config files from previous LTS kernels
> should have both. Finally remove SOC_VIRT and update all config files
> using it.
>
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> ---
> I had a 1.5 year old ack from Jason that I dropped due to the passage of
> time.
>
> CC: Paul Walmsley <paul.walmsley@...ive.com>
> CC: Palmer Dabbelt <palmer@...belt.com>
> CC: Albert Ou <aou@...s.berkeley.edu>
> CC: Brendan Higgins <brendan.higgins@...ux.dev>
> CC: David Gow <davidgow@...gle.com>
> CC: Rae Moar <rmoar@...gle.com>
> CC: "Jason A. Donenfeld" <Jason@...c4.com>
> CC: Shuah Khan <shuah@...nel.org>
> CC: linux-riscv@...ts.infradead.org
> CC: linux-kernel@...r.kernel.org
> CC: linux-kselftest@...r.kernel.org
> CC: kunit-dev@...glegroups.com
> CC: wireguard@...ts.zx2c4.com
> CC: netdev@...r.kernel.org
> ---
>  arch/riscv/Kconfig.socs                                    | 3 ---
>  arch/riscv/configs/defconfig                               | 2 +-
>  arch/riscv/configs/nommu_virt_defconfig                    | 2 +-
>  tools/testing/kunit/qemu_configs/riscv.py                  | 2 +-
>  tools/testing/selftests/wireguard/qemu/arch/riscv32.config | 2 +-
>  tools/testing/selftests/wireguard/qemu/arch/riscv64.config | 2 +-
>  6 files changed, 5 insertions(+), 8 deletions(-)
>
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index e85ffb63c48d..dcbfb659839c 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -52,9 +52,6 @@ config ARCH_THEAD
>  	  This enables support for the RISC-V based T-HEAD SoCs.
>
>  config ARCH_VIRT
> -	def_bool SOC_VIRT
> -
> -config SOC_VIRT
>  	bool "QEMU Virt Machine"
>  	select CLINT_TIMER if RISCV_M_MODE
>  	select POWER_RESET
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index ab3bab313d56..8d46a9137b1e 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -32,7 +32,7 @@ CONFIG_ARCH_SOPHGO=y
>  CONFIG_SOC_STARFIVE=y
>  CONFIG_ARCH_SUNXI=y
>  CONFIG_ARCH_THEAD=y
> -CONFIG_SOC_VIRT=y
> +CONFIG_ARCH_VIRT=y
>  CONFIG_SMP=y
>  CONFIG_HOTPLUG_CPU=y
>  CONFIG_PM=y
> diff --git a/arch/riscv/configs/nommu_virt_defconfig b/arch/riscv/configs/nommu_virt_defconfig
> index b794e2f8144e..de8143d1f738 100644
> --- a/arch/riscv/configs/nommu_virt_defconfig
> +++ b/arch/riscv/configs/nommu_virt_defconfig
> @@ -24,7 +24,7 @@ CONFIG_EXPERT=y
>  CONFIG_SLUB=y
>  CONFIG_SLUB_TINY=y
>  # CONFIG_MMU is not set
> -CONFIG_SOC_VIRT=y
> +CONFIG_ARCH_VIRT=y
>  CONFIG_NONPORTABLE=y
>  CONFIG_SMP=y
>  CONFIG_CMDLINE="root=/dev/vda rw earlycon=uart8250,mmio,0x10000000,115200n8 console=ttyS0"
> diff --git a/tools/testing/kunit/qemu_configs/riscv.py b/tools/testing/kunit/qemu_configs/riscv.py
> index 12a1d525978a..c87758030ff7 100644
> --- a/tools/testing/kunit/qemu_configs/riscv.py
> +++ b/tools/testing/kunit/qemu_configs/riscv.py
> @@ -13,7 +13,7 @@ if not os.path.isfile(OPENSBI_PATH):
>
>  QEMU_ARCH = QemuArchParams(linux_arch='riscv',
>  			   kconfig='''
> -CONFIG_SOC_VIRT=y
> +CONFIG_ARCH_VIRT=y
>  CONFIG_SERIAL_8250=y
>  CONFIG_SERIAL_8250_CONSOLE=y
>  CONFIG_SERIAL_OF_PLATFORM=y
> diff --git a/tools/testing/selftests/wireguard/qemu/arch/riscv32.config b/tools/testing/selftests/wireguard/qemu/arch/riscv32.config
> index 2fc36efb166d..2500eaa9b469 100644
> --- a/tools/testing/selftests/wireguard/qemu/arch/riscv32.config
> +++ b/tools/testing/selftests/wireguard/qemu/arch/riscv32.config
> @@ -2,7 +2,7 @@ CONFIG_NONPORTABLE=y
>  CONFIG_ARCH_RV32I=y
>  CONFIG_MMU=y
>  CONFIG_FPU=y
> -CONFIG_SOC_VIRT=y
> +CONFIG_ARCH_VIRT=y
>  CONFIG_SERIAL_8250=y
>  CONFIG_SERIAL_8250_CONSOLE=y
>  CONFIG_SERIAL_OF_PLATFORM=y
> diff --git a/tools/testing/selftests/wireguard/qemu/arch/riscv64.config b/tools/testing/selftests/wireguard/qemu/arch/riscv64.config
> index dc266f3b1915..29a67ac67766 100644
> --- a/tools/testing/selftests/wireguard/qemu/arch/riscv64.config
> +++ b/tools/testing/selftests/wireguard/qemu/arch/riscv64.config
> @@ -1,7 +1,7 @@
>  CONFIG_ARCH_RV64I=y
>  CONFIG_MMU=y
>  CONFIG_FPU=y
> -CONFIG_SOC_VIRT=y
> +CONFIG_ARCH_VIRT=y
>  CONFIG_SERIAL_8250=y
>  CONFIG_SERIAL_8250_CONSOLE=y
>  CONFIG_SERIAL_OF_PLATFORM=y

Acked-by: Palmer Dabbelt <palmer@...osinc.com>

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