netdev - RE: [Intel-wired-lan] [PATCH net-next v9 2/6] ice: Support 5 layer topology

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Message-ID: <CYYPR11MB84292318DF94D72A20F63362BD052@CYYPR11MB8429.namprd11.prod.outlook.com>
Date: Thu, 11 Apr 2024 12:14:28 +0000
From: "Pucha, HimasekharX Reddy" <himasekharx.reddy.pucha@...el.com>
To: "Polchlopek, Mateusz" <mateusz.polchlopek@...el.com>,
	"intel-wired-lan@...ts.osuosl.org" <intel-wired-lan@...ts.osuosl.org>
CC: "andrew@...n.ch" <andrew@...n.ch>, "jiri@...nulli.us" <jiri@...nulli.us>,
	"Wilczynski, Michal" <michal.wilczynski@...el.com>, "Polchlopek, Mateusz"
	<mateusz.polchlopek@...el.com>, "netdev@...r.kernel.org"
	<netdev@...r.kernel.org>, "Czapnik, Lukasz" <lukasz.czapnik@...el.com>, "Raj,
 Victor" <victor.raj@...el.com>, "Nguyen, Anthony L"
	<anthony.l.nguyen@...el.com>, "horms@...nel.org" <horms@...nel.org>,
	"Kitszel, Przemyslaw" <przemyslaw.kitszel@...el.com>, "kuba@...nel.org"
	<kuba@...nel.org>
Subject: RE: [Intel-wired-lan] [PATCH net-next v9 2/6] ice: Support 5 layer
 topology

> -----Original Message-----
> From: Intel-wired-lan <intel-wired-lan-bounces@...osl.org> On Behalf Of Mateusz Polchlopek
> Sent: Wednesday, April 3, 2024 1:11 PM
> To: intel-wired-lan@...ts.osuosl.org
> Cc: andrew@...n.ch; jiri@...nulli.us; Wilczynski, Michal <michal.wilczynski@...el.com>; Polchlopek, Mateusz <mateusz.polchlopek@...el.com>; netdev@...r.kernel.org; Czapnik, Lukasz <lukasz.czapnik@...el.com>; Raj, Victor <victor.raj@...el.com>; Nguyen, Anthony L <anthony.l.nguyen@...el.com>; horms@...nel.org; Kitszel, Przemyslaw <przemyslaw.kitszel@...el.com>; kuba@...nel.org
> Subject: [Intel-wired-lan] [PATCH net-next v9 2/6] ice: Support 5 layer topology
>
> From: Raj Victor <victor.raj@...el.com>
>
> There is a performance issue when the number of VSIs are not multiple of 8. This is caused due to the max children limitation per node(8) in
> 9 layer topology. The BW credits are shared evenly among the children by default. Assume one node has 8 children and the other has 1.
> The parent of these nodes share the BW credit equally among them.
> Apparently this causes a problem for the first node which has 8 children.
> The 9th VM get more BW credits than the first 8 VMs.
>
> Example:
>
> 1) With 8 VM's:
> for x in 0 1 2 3 4 5 6 7;
> do taskset -c ${x} netperf -P0 -H 172.68.169.125 &  sleep .1 ; done
>
> tx_queue_0_packets: 23283027
> tx_queue_1_packets: 23292289
> tx_queue_2_packets: 23276136
> tx_queue_3_packets: 23279828
> tx_queue_4_packets: 23279828
> tx_queue_5_packets: 23279333
> tx_queue_6_packets: 23277745
> tx_queue_7_packets: 23279950
> tx_queue_8_packets: 0
>
> 2) With 9 VM's:
> for x in 0 1 2 3 4 5 6 7 8;
> do taskset -c ${x} netperf -P0 -H 172.68.169.125 &  sleep .1 ; done
>
> tx_queue_0_packets: 24163396
> tx_queue_1_packets: 24164623
> tx_queue_2_packets: 24163188
> tx_queue_3_packets: 24163701
> tx_queue_4_packets: 24163683
> tx_queue_5_packets: 24164668
> tx_queue_6_packets: 23327200
> tx_queue_7_packets: 24163853
> tx_queue_8_packets: 91101417
>
> So on average queue 8 statistics show that 3.7 times more packets were send there than to the other queues.
>
> The FW starting with version 3.20, has increased the max number of children per node by reducing the number of layers from 9 to 5. Reflect this on driver side.
>
> Signed-off-by: Raj Victor <victor.raj@...el.com>
> Co-developed-by: Michal Wilczynski <michal.wilczynski@...el.com>
> Signed-off-by: Michal Wilczynski <michal.wilczynski@...el.com>
> Co-developed-by: Mateusz Polchlopek <mateusz.polchlopek@...el.com>
> Signed-off-by: Mateusz Polchlopek <mateusz.polchlopek@...el.com>
> ---
>  .../net/ethernet/intel/ice/ice_adminq_cmd.h   |  23 ++
>  drivers/net/ethernet/intel/ice/ice_common.c   |   5 +
>  drivers/net/ethernet/intel/ice/ice_ddp.c      | 205 ++++++++++++++++++
>  drivers/net/ethernet/intel/ice/ice_ddp.h      |   2 +
>  drivers/net/ethernet/intel/ice/ice_sched.h    |   3 +
>  drivers/net/ethernet/intel/ice/ice_type.h     |   1 +
>  6 files changed, 239 insertions(+)
>

Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@...el.com> (A Contingent worker at Intel)