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Message-ID: <87mspkk28h.fsf@pengutronix.de>
Date: Tue, 23 Apr 2024 08:43:58 +0200
From: Steffen Trumtrar <s.trumtrar@...gutronix.de>
To: Sébastien Szymanski <sebastien.szymanski@...adeus.com>
Cc: "David S. Miller" <davem@...emloft.net>, Eric Dumazet
<edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, Paolo Abeni
<pabeni@...hat.com>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski
<krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>, Fabio Estevam
<festevam@...il.com>, Clark Wang <xiaoning.wang@....com>, Linux Team
<linux-imx@....com>, Alexandre Torgue <alexandre.torgue@...s.st.com>,
Jose Abreu <joabreu@...opsys.com>, Maxime Coquelin
<mcoquelin.stm32@...il.com>, netdev@...r.kernel.org,
devicetree@...r.kernel.org, imx@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-stm32@...md-mailman.stormreply.com
Subject: Re: [PATCH 0/3] arm64: mx93: etherrnet: set TX_CLK in RMII mode
Hi,
On 2024-04-22 at 11:28 +02, Sébastien Szymanski <sebastien.szymanski@...adeus.com> wrote:
> Hello, On 4/22/24 10:46, Steffen Trumtrar wrote:
> > This series adds support for setting the TX_CLK direction in the eQOS ethernet core on the i.MX93 when RMII mode is used. According to AN14149, when the i.MX93 ethernet controller is used in RMII mode, the TX_CLK *must* be set to output mode.
> Must ? I don't think that is true. Downstream NXP kernel has an option to set TX_CLK as an input:
>
re-reading that passage again, it only says "other registers that must be configured" and that the ENET_QOS_CLK_TX_CLK_SEL bit "is 0b1" for RMII. So, maybe you are right.
Thanks,
Steffen
> https://github.com/nxp-imx/linux-imx/blob/lf-6.6.y/Documentation/devicetree/bindings/net/nxp%2Cdwmac-imx.yaml#L69
>
> https://github.com/nxp-imx/linux-imx/commit/fbc17f6f7919d03c275fc48b0400c212475b60ec
>
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