netdev - Re: [PATCH net-next v4 02/12] net: ethernet: oa_tc6: implement register write operation

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Date: Fri, 26 Apr 2024 05:55:45 +0000
From: <Parthiban.Veerasooran@...rochip.com>
To: <andrew@...n.ch>
CC: <davem@...emloft.net>, <edumazet@...gle.com>, <kuba@...nel.org>,
	<pabeni@...hat.com>, <horms@...nel.org>, <saeedm@...dia.com>,
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	<linux-kernel@...r.kernel.org>, <corbet@....net>,
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	<krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>,
	<devicetree@...r.kernel.org>, <Horatiu.Vultur@...rochip.com>,
	<ruanjinjie@...wei.com>, <Steen.Hegelund@...rochip.com>,
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	<Thorsten.Kummermehr@...rochip.com>, <Pier.Beruto@...emi.com>,
	<Selvamani.Rajagopal@...emi.com>, <Nicolas.Ferre@...rochip.com>,
	<benjamin.bigler@...nformulastudent.ch>
Subject: Re: [PATCH net-next v4 02/12] net: ethernet: oa_tc6: implement
 register write operation

Hi Andrew,

On 24/04/24 4:44 am, Andrew Lunn wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> On Thu, Apr 18, 2024 at 06:26:38PM +0530, Parthiban Veerasooran wrote:
>> Implement register write operation according to the control communication
>> specified in the OPEN Alliance 10BASE-T1x MACPHY Serial Interface
>> document. Control write commands are used by the SPI host to write
>> registers within the MAC-PHY. Each control write commands are composed of
>> a 32 bits control command header followed by register write data.
>>
>> The MAC-PHY ignores the final 32 bits of data from the SPI host at the
>> end of the control write command. The write command and data is also
>> echoed from the MAC-PHY back to the SPI host to enable the SPI host to
>> identify which register write failed in the case of any bus errors.
>> Control write commands can write either a single register or multiple
>> consecutive registers. When multiple consecutive registers are written,
>> the address is automatically post-incremented by the MAC-PHY. Writing to
>> any unimplemented or undefined registers shall be ignored and yield no
>> effect.
>>
>> Signed-off-by: Parthiban Veerasooran <Parthiban.Veerasooran@...rochip.com>
> 
> Apart from the Return: issues:
OK. Thanks.

Best regards,
Parthiban V
> 
> Reviewed-by: Andrew Lunn <andrew@...n.ch>
> 
>      Andrew
>