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Message-ID: <e96bfb0a-fa1d-423e-925d-32f4e1e00421@kernel.org>
Date: Wed, 8 May 2024 09:34:37 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Daniel Golle <daniel@...rotopia.org>,
"David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Matthias Brugger
<matthias.bgg@...il.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
Lorenzo Bianconi <lorenzo@...nel.org>, Felix Fietkau <nbd@....name>,
netdev@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH v2] dt-bindings: net: mediatek: remove wrongly added
clocks and SerDes
On 07/05/2024 14:20, Daniel Golle wrote:
> Several clocks as well as both sgmiisys phandles were added by mistake
> to the Ethernet bindings for MT7988. Also, the total number of clocks
> didn't match with the actual number of items listed.
>
> This happened because the vendor driver which served as a reference uses
> a high number of syscon phandles to access various parts of the SoC
> which wasn't acceptable upstream. Hence several parts which have never
> previously been supported (such SerDes PHY and USXGMII PCS) are going to
> be implemented by separate drivers. As a result the device tree will
> look much more sane.
>
> Quickly align the bindings with the upcoming reality of the drivers
> actually adding support for the remaining Ethernet-related features of
> the MT7988 SoC.
>
> Fixes: c94a9aabec36 ("dt-bindings: net: mediatek,net: add mt7988-eth binding")
> Signed-off-by: Daniel Golle <daniel@...rotopia.org>
> ---
> v2: don't make changes to the order of clocks
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Best regards,
Krzysztof
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