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Message-ID: <20240514160201.1651627-2-rengarajan.s@microchip.com>
Date: Tue, 14 May 2024 21:32:00 +0530
From: Rengarajan S <rengarajan.s@...rochip.com>
To: <woojung.huh@...rochip.com>, <UNGLinuxDriver@...rochip.com>,
	<davem@...emloft.net>, <edumazet@...gle.com>, <kuba@...nel.org>,
	<pabeni@...hat.com>, <netdev@...r.kernel.org>, <linux-usb@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>
CC: <rengarajan.s@...rochip.com>
Subject: [PATCH net-next v2 1/2] lan78xx: Enable 125 MHz CLK configuration for LAN7801 if NO EEPROM is detected

The 125MHz and 25MHz clock configurations are enabled in the initialization
regardless of EEPROM (125MHz is needed for RGMII 1000Mbps operation). After
a lite reset (lan78xx_reset), these contents go back to defaults(all 0, so
no 125MHz or 25MHz clock).

Signed-off-by: Rengarajan S <rengarajan.s@...rochip.com>
---
 drivers/net/usb/lan78xx.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/usb/lan78xx.c b/drivers/net/usb/lan78xx.c
index ba6c8ac2a736..7ac540cc3686 100644
--- a/drivers/net/usb/lan78xx.c
+++ b/drivers/net/usb/lan78xx.c
@@ -2944,6 +2944,8 @@ static int lan78xx_reset(struct lan78xx_net *dev)
 		return ret;
 
 	buf |= HW_CFG_MEF_;
+	buf |= HW_CFG_CLK125_EN_;
+	buf |= HW_CFG_REFCLK25_EN_;
 
 	ret = lan78xx_write_reg(dev, HW_CFG, buf);
 	if (ret < 0)
-- 
2.25.1


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