lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CYYPR11MB842975C2FC5598593A117D70BDEE2@CYYPR11MB8429.namprd11.prod.outlook.com>
Date: Fri, 17 May 2024 07:25:09 +0000
From: "Pucha, HimasekharX Reddy" <himasekharx.reddy.pucha@...el.com>
To: "Kolacinski, Karol" <karol.kolacinski@...el.com>,
	"intel-wired-lan@...ts.osuosl.org" <intel-wired-lan@...ts.osuosl.org>
CC: "netdev@...r.kernel.org" <netdev@...r.kernel.org>, "Kubalewski, Arkadiusz"
	<arkadiusz.kubalewski@...el.com>, "Kolacinski, Karol"
	<karol.kolacinski@...el.com>, "Nguyen, Anthony L"
	<anthony.l.nguyen@...el.com>
Subject: RE: [Intel-wired-lan] [PATCH v10 iwl-next 12/12] ice: Adjust PTP init
 for 2x50G E825C devices

> -----Original Message-----
> From: Intel-wired-lan <intel-wired-lan-bounces@...osl.org> On Behalf Of Karol Kolacinski
> Sent: Wednesday, April 24, 2024 7:00 PM
> To: intel-wired-lan@...ts.osuosl.org
> Cc: netdev@...r.kernel.org; Kubalewski, Arkadiusz <arkadiusz.kubalewski@...el.com>; Kolacinski, Karol <karol.kolacinski@...el.com>; Nguyen, Anthony L <anthony.l.nguyen@...el.com>
> Subject: [Intel-wired-lan] [PATCH v10 iwl-next 12/12] ice: Adjust PTP init for 2x50G E825C devices
>
> From: Grzegorz Nitka <grzegorz.nitka@...el.com>
>
> From FW/HW perspective, 2 port topology in E825C devices requires merging of 2 port mapping internally and breakout mapping externally.
> As a consequence, it requires different port numbering from PTP code perspective.
> For that topology, pf_id can not be used to index PTP ports. Even if the 2nd port is identified as port with pf_id = 1, all PHY operations need to be performed as it was port 2. Thus, special mapping is needed for the 2nd port.
> This change adds detection of 2x50G topology and applies 'custom'
> mapping on the 2nd port.
>
> Signed-off-by: Grzegorz Nitka <grzegorz.nitka@...el.com>
> Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@...el.com>
> Signed-off-by: Karol Kolacinski <karol.kolacinski@...el.com>
> ---
> V4 -> V5: - reworded commit mesage
>           - renamed GLGEN_SWITCH_MODE_CONFIG_SELECT_25X4_ON_SINGLE_QUAD_M to
>             GLGEN_SWITCH_MODE_CONFIG_25X4_QUAD_M
>
> .../net/ethernet/intel/ice/ice_hw_autogen.h   |  4 ++++
>  drivers/net/ethernet/intel/ice/ice_ptp.c      |  5 +++++
>  drivers/net/ethernet/intel/ice/ice_ptp_hw.c   | 22 +++++++++++++++++++
>  drivers/net/ethernet/intel/ice/ice_type.h     |  9 ++++++++
>  4 files changed, 40 insertions(+)
>

Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@...el.com> (A Contingent worker at Intel)


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ