lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <63268a9c-6dc2-43fe-83c2-46c6e617247d@microchip.com>
Date: Mon, 27 May 2024 09:30:40 +0000
From: <Parthiban.Veerasooran@...rochip.com>
To: <andrew@...n.ch>, <ramon.nordin.rodriguez@...roamp.se>
CC: <Pier.Beruto@...emi.com>, <davem@...emloft.net>, <edumazet@...gle.com>,
	<kuba@...nel.org>, <pabeni@...hat.com>, <horms@...nel.org>,
	<saeedm@...dia.com>, <anthony.l.nguyen@...el.com>, <netdev@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>, <corbet@....net>,
	<linux-doc@...r.kernel.org>, <robh+dt@...nel.org>,
	<krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>,
	<devicetree@...r.kernel.org>, <Horatiu.Vultur@...rochip.com>,
	<ruanjinjie@...wei.com>, <Steen.Hegelund@...rochip.com>,
	<vladimir.oltean@....com>, <UNGLinuxDriver@...rochip.com>,
	<Thorsten.Kummermehr@...rochip.com>, <Selvamani.Rajagopal@...emi.com>,
	<Nicolas.Ferre@...rochip.com>, <benjamin.bigler@...nformulastudent.ch>
Subject: Re: [PATCH net-next v4 05/12] net: ethernet: oa_tc6: implement error
 interrupts unmasking

Hi Andrew,

On 25/05/24 12:01 am, Andrew Lunn wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
>> After a considerable ammount of headscratching it seems that disabling collision
>> detection on the macphy is the only way of getting it stable.
>> When PLCA is enabled it's expected that CD causes problems, when running
>> in CSMA/CD mode it was unexpected (for me at least).
> 
> Now we are back to, why is your system different? What is triggering a
> collision for you, but not Parthiban?
I am using PHY driver which has "Disable CD if PLCA is enabled" fix. 
Probably that could be the reason that why I am not running into these 
issues.
> 
> There is nothing in the standard about reporting a collision. So this
> is a Microchip extension? So the framework is not doing anything when
> it happens, which will explain why it becomes a storm.... Until we do
> have a mechanism to handle vendor specific interrupts, the frame work
> should disable them all, to avoid this storm.
"IEEE 10BASE-T1S Implementation Specification" from OPEN Alliance does 
specify this in the section "5.2 Collision Detection (CD) / Handling" 
for the Automotive environment support.

https://opensig.org/wp-content/uploads/2023/12/20230215_10BASE-T1S_system_implementation_V1_0.pdf

The automotive EMC immunity requirements exceeds the alien crosstalk 
noise levels defined in IEEE 802.3cgTM-2019 [1]. Therefore, in such 
environment the CD mechanism of the PHY may not be able to distinguish 
noise from collisions, limiting the achievable level of immunity.
> 
> Does the datasheet document what to do on a collision? How are you
> supposed to clear the condition?
"8.5 PLCA Collision Detection" section in the LAN8650/1 datasheet 
describes the importance of disabling collision detection in case of 
PLCA mode enabled.

When nodes in a mixing segment are properly configured for PLCA 
operation there will be no physical collisions. However, under certain 
conditions, including mixing segments with significant inherent noise 
due to reflections, and systems under high electromagnetic stress, false 
collisions may be detected. The false detection of late collisions will 
result in the transmitting node dropping the packet. As packets are 
typically received correctly in these conditions, it is recommended to 
disable collision detection at any time that PLCA is enabled and active. 
Collision detection is disabled by writing a zero to the Collision 
Detect Enable (CDEN) bit in the Collision Detector Control 0 (CDCTL0) 
register.

https://ww1.microchip.com/downloads/aemDocuments/documents/AIS/ProductDocuments/DataSheets/LAN8650-1-Data-Sheet-60001734.pdf

Hope this clarifies.

Best regards,
Parthiban V
> 
>         Andrew

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ