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Message-Id: <E1sD0PA-00EzCC-Qb@rmk-PC.armlinux.org.uk>
Date: Fri, 31 May 2024 12:26:40 +0100
From: "Russell King (Oracle)" <rmk+kernel@...linux.org.uk>
To: Serge Semin <fancer.lancer@...il.com>
Cc: Andrew Halaney <ahalaney@...hat.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Jose Abreu <joabreu@...opsys.com>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
netdev@...r.kernel.org,
linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org
Subject: [PATCH RFC net-next v2 6/8] net: stmmac: dwmac4: move PCS interrupt
control
Control the PCS interrupt mask from the phylink pcs_enable() and
pcs_disable() methods rather than relying on driver variables.
This assumes that GMAC_INT_RGSMIIS, GMAC_INT_PCS_LINK and
GMAC_INT_PCS_ANE are all relevant to the PCS.
Signed-off-by: Russell King (Oracle) <rmk+kernel@...linux.org.uk>
---
.../net/ethernet/stmicro/stmmac/dwmac4_core.c | 29 +++++++++++++++++--
1 file changed, 26 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
index cb99cb69c52b..5cf2a6cb8f66 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -56,9 +56,6 @@ static void dwmac4_core_init(struct mac_device_info *hw,
/* Enable GMAC interrupts */
value = GMAC_INT_DEFAULT_ENABLE;
- if (hw->pcs)
- value |= GMAC_PCS_IRQ_DEFAULT;
-
/* Enable FPE interrupt */
if ((GMAC_HW_FEAT_FPESEL & readl(ioaddr + GMAC_HW_FEATURE3)) >> 26)
value |= GMAC_INT_FPE_EN;
@@ -770,6 +767,30 @@ static int dwmac4_mii_pcs_validate(struct phylink_pcs *pcs,
return 0;
}
+static int dwmac4_mii_pcs_enable(struct phylink_pcs *pcs)
+{
+ struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs);
+ void __iomem *ioaddr = hw->pcsr;
+ u32 intr_enable;
+
+ intr_enable = readl(ioaddr + GMAC_INT_EN);
+ intr_enable |= GMAC_PCS_IRQ_DEFAULT;
+ writel(intr_enable, ioaddr + GMAC_INT_EN);
+
+ return 0;
+}
+
+static void dwmac4_mii_pcs_disable(struct phylink_pcs *pcs)
+{
+ struct mac_device_info *hw = phylink_pcs_to_mac_dev_info(pcs);
+ void __iomem *ioaddr = hw->pcsr;
+ u32 intr_enable;
+
+ intr_enable = readl(ioaddr + GMAC_INT_EN);
+ intr_enable &= ~GMAC_PCS_IRQ_DEFAULT;
+ writel(intr_enable, ioaddr + GMAC_INT_EN);
+}
+
static int dwmac4_mii_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
phy_interface_t interface,
const unsigned long *advertising,
@@ -817,6 +838,8 @@ static void dwmac4_mii_pcs_get_state(struct phylink_pcs *pcs,
static const struct phylink_pcs_ops dwmac4_mii_pcs_ops = {
.pcs_validate = dwmac4_mii_pcs_validate,
+ .pcs_enable = dwmac4_mii_pcs_enable,
+ .pcs_disable = dwmac4_mii_pcs_disable,
.pcs_config = dwmac4_mii_pcs_config,
.pcs_get_state = dwmac4_mii_pcs_get_state,
};
--
2.30.2
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