lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <Zl3Fwoiv1bJlGaQZ@makrotopia.org>
Date: Mon, 3 Jun 2024 14:31:46 +0100
From: Daniel Golle <daniel@...rotopia.org>
To: "Russell King (Oracle)" <linux@...linux.org.uk>
Cc: Sky Huang <SkyLake.Huang@...iatek.com>, Andrew Lunn <andrew@...n.ch>,
	Heiner Kallweit <hkallweit1@...il.com>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Qingfang Deng <dqfext@...il.com>,
	Matthias Brugger <matthias.bgg@...il.com>,
	AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
	linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-mediatek@...ts.infradead.org,
	Steven Liu <Steven.Liu@...iatek.com>
Subject: Re: [PATCH net-next v6 5/5] net: phy: add driver for built-in 2.5G
 ethernet PHY on MT7988

On Mon, Jun 03, 2024 at 02:25:01PM +0100, Russell King (Oracle) wrote:
> On Mon, Jun 03, 2024 at 08:18:34PM +0800, Sky Huang wrote:
> > Add support for internal 2.5Gphy on MT7988. This driver will load
> > necessary firmware, add appropriate time delay and figure out LED.
> > Also, certain control registers will be set to fix link-up issues.
> 
> Based on our previous discussion, it may be worth checking in the
> .config_init() method whether phydev->interface is one of the
> PHY interface modes that this PHY supports. As I understand from one
> of your previous emails, the possibilities are XGMII, USXGMII or
> INTERNAL. Thus:
> 
> > +static int mt798x_2p5ge_phy_config_init(struct phy_device *phydev)
> > +{
> > +	struct pinctrl *pinctrl;
> > +	int ret;
> 
> 	/* Check that the PHY interface type is compatible */
> 	if (phydev->interface != PHY_INTERFACE_MODE_INTERNAL &&
> 	    phydev->interface != PHY_INTERFACE_MODE_XGMII &&
> 	    phydev->interface != PHY_INTERFACE_MODE_USXGMII)
> 		return -ENODEV;

The PHY is built-into the SoC, and as such the connection type should
always be "internal". The PHY does not exist as dedicated IC, only
as built-in part of the MT7988 SoC.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ