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Message-ID: <e8e69a34-b9b2-4b4c-9b2e-079c7a23b756@denx.de>
Date: Tue, 4 Jun 2024 18:49:54 +0200
From: Marek Vasut <marex@...x.de>
To: Christophe Roullier <christophe.roullier@...s.st.com>,
"David S . Miller" <davem@...emloft.net>, Eric Dumazet
<edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Richard Cochran <richardcochran@...il.com>, Jose Abreu
<joabreu@...opsys.com>, Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>
Cc: netdev@...r.kernel.org, devicetree@...r.kernel.org,
linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 08/11] ARM: dts: stm32: add ethernet1 and ethernet2
support on stm32mp13
On 6/4/24 4:34 PM, Christophe Roullier wrote:
> Both instances ethernet based on GMAC SNPS IP on stm32mp13.
> GMAC IP version is SNPS 4.20.
>
> Signed-off-by: Christophe Roullier <christophe.roullier@...s.st.com>
> ---
> arch/arm/boot/dts/st/stm32mp131.dtsi | 38 ++++++++++++++++++++++++++++
> arch/arm/boot/dts/st/stm32mp133.dtsi | 31 +++++++++++++++++++++++
> 2 files changed, 69 insertions(+)
>
> diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi
> index 6704ceef284d3..9d05853ececf7 100644
> --- a/arch/arm/boot/dts/st/stm32mp131.dtsi
> +++ b/arch/arm/boot/dts/st/stm32mp131.dtsi
> @@ -979,6 +979,12 @@ ts_cal1: calib@5c {
> ts_cal2: calib@5e {
> reg = <0x5e 0x2>;
> };
> + ethernet_mac1_address: mac1@e4 {
> + reg = <0xe4 0x6>;
> + };
> + ethernet_mac2_address: mac2@ea {
> + reg = <0xea 0x6>;
> + };
> };
>
> etzpc: bus@...07000 {
> @@ -1505,6 +1511,38 @@ sdmmc2: mmc@...07000 {
> status = "disabled";
> };
>
> + ethernet1: ethernet@...0a000 {
> + compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a";
> + reg = <0x5800a000 0x2000>;
> + reg-names = "stmmaceth";
> + interrupts-extended = <&intc GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
> + <&exti 68 1>;
> + interrupt-names = "macirq", "eth_wake_irq";
> + clock-names = "stmmaceth",
> + "mac-clk-tx",
> + "mac-clk-rx",
> + "ethstp",
> + "eth-ck";
> + clocks = <&rcc ETH1MAC>,
> + <&rcc ETH1TX>,
> + <&rcc ETH1RX>,
> + <&rcc ETH1STP>,
> + <&rcc ETH1CK_K>;
> + st,syscon = <&syscfg 0x4 0xff0000>;
> + snps,mixed-burst;
> + snps,pbl = <2>;
> + snps,axi-config = <&stmmac_axi_config_1>;
> + snps,tso;
> + access-controllers = <&etzpc 48>;
Please keep the list of properties sorted.
> + status = "disabled";
> +
> + stmmac_axi_config_1: stmmac-axi-config {
> + snps,wr_osr_lmt = <0x7>;
> + snps,rd_osr_lmt = <0x7>;
> + snps,blen = <0 0 0 0 16 8 4>;
Sort here too.
> + };
> + };
> +
> usbphyc: usbphyc@...06000 {
> #address-cells = <1>;
> #size-cells = <0>;
> diff --git a/arch/arm/boot/dts/st/stm32mp133.dtsi b/arch/arm/boot/dts/st/stm32mp133.dtsi
> index 3e394c8e58b92..09c7da1a2eda8 100644
> --- a/arch/arm/boot/dts/st/stm32mp133.dtsi
> +++ b/arch/arm/boot/dts/st/stm32mp133.dtsi
> @@ -67,5 +67,36 @@ channel@18 {
> label = "vrefint";
> };
> };
> +
> + ethernet2: ethernet@...0e000 {
> + compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a";
> + reg = <0x5800e000 0x2000>;
> + reg-names = "stmmaceth";
> + interrupts-extended = <&intc GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "macirq";
> + clock-names = "stmmaceth",
> + "mac-clk-tx",
> + "mac-clk-rx",
> + "ethstp",
> + "eth-ck";
> + clocks = <&rcc ETH2MAC>,
> + <&rcc ETH2TX>,
> + <&rcc ETH2RX>,
> + <&rcc ETH2STP>,
> + <&rcc ETH2CK_K>;
> + st,syscon = <&syscfg 0x4 0xff000000>;
> + snps,mixed-burst;
> + snps,pbl = <2>;
> + snps,axi-config = <&stmmac_axi_config_2>;
> + snps,tso;
> + access-controllers = <&etzpc 49>;
Sort here too.
> + status = "disabled";
> +
> + stmmac_axi_config_2: stmmac-axi-config {
> + snps,wr_osr_lmt = <0x7>;
> + snps,rd_osr_lmt = <0x7>;
> + snps,blen = <0 0 0 0 16 8 4>;
Sort here too.
[...]
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