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Message-Id: <20240604092304.314636-2-enguerrand.de-ribaucourt@savoirfairelinux.com>
Date: Tue,  4 Jun 2024 09:23:02 +0000
From: Enguerrand de Ribaucourt <enguerrand.de-ribaucourt@...oirfairelinux.com>
To: netdev@...r.kernel.org
Cc: andrew@...n.ch,
	hkallweit1@...il.com,
	linux@...linux.org.uk,
	woojung.huh@...rochip.com,
	UNGLinuxDriver@...rochip.com,
	horms@...nel.org,
	Tristram.Ha@...rochip.com,
	Arun.Ramadoss@...rochip.com,
	Enguerrand de Ribaucourt <enguerrand.de-ribaucourt@...oirfairelinux.com>
Subject: [PATCH net v5 1/4] net: phy: micrel: add Microchip KSZ 9897 Switch PHY support

There is a DSA driver for microchip,ksz9897 which can be controlled
through SPI or I2C. This patch adds support for it's CPU ports PHYs to
also allow network access to the switch's CPU port.

The CPU ports PHYs of the KSZ9897 are not documented in the datasheet.
They weirdly use the same PHY ID as the KSZ8081, which is a different
PHY and that driver isn't compatible with KSZ9897. Before this patch,
the KSZ8081 driver was used for the CPU ports of the KSZ9897 but the
link would never come up.

A new driver for the KSZ9897 is added, based on the compatible KSZ87XX.
I could not test if Gigabit Ethernet works, but the link comes up and
can successfully allow packets to be sent and received with DSA tags.

To resolve the KSZ8081/KSZ9897 phy_id conflicts, I could not find any
stable register to distinguish them. Instead of a match_phy_device() ,
I've declared a virtual phy_id with the highest value in Microchip's OUI
range.

Example usage in the device tree:
	compatible = "ethernet-phy-id0022.17ff";

A discussion to find better alternatives had been opened with the
Microchip team, with no response yet.

See https://lore.kernel.org/all/20220207174532.362781-1-enguerrand.de-ribaucourt@savoirfairelinux.com/

Fixes: b987e98e50ab ("dsa: add DSA switch driver for Microchip KSZ9477")
Signed-off-by: Enguerrand de Ribaucourt <enguerrand.de-ribaucourt@...oirfairelinux.com>
---
v5:
 - rewrap comments
 - restore suspend/resume for KSZ9897
v4: https://lore.kernel.org/all/20240531142430.678198-2-enguerrand.de-ribaucourt@savoirfairelinux.com/
 - rebase on net/main
 - add Fixes tag
 - use pseudo phy_id instead of of_tree search
v3: https://lore.kernel.org/all/20240530102436.226189-2-enguerrand.de-ribaucourt@savoirfairelinux.com/
---
 drivers/net/phy/micrel.c   | 13 ++++++++++++-
 include/linux/micrel_phy.h |  4 ++++
 2 files changed, 16 insertions(+), 1 deletion(-)

diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
index 8c20cf937530..11e58fc628df 100644
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel.c
@@ -16,7 +16,7 @@
  *			   ksz8081, ksz8091,
  *			   ksz8061,
  *		Switch : ksz8873, ksz886x
- *			 ksz9477, lan8804
+ *			 ksz9477, ksz9897, lan8804
  */
 
 #include <linux/bitfield.h>
@@ -5545,6 +5545,16 @@ static struct phy_driver ksphy_driver[] = {
 	.suspend	= genphy_suspend,
 	.resume		= ksz9477_resume,
 	.get_features	= ksz9477_get_features,
+}, {
+	.phy_id		= PHY_ID_KSZ9897,
+	.phy_id_mask	= MICREL_PHY_ID_MASK,
+	.name		= "Microchip KSZ9897 Switch",
+	/* PHY_BASIC_FEATURES */
+	.config_init	= kszphy_config_init,
+	.config_aneg	= ksz8873mll_config_aneg,
+	.read_status	= ksz8873mll_read_status,
+	.suspend	= genphy_suspend,
+	.resume		= genphy_resume,
 } };
 
 module_phy_driver(ksphy_driver);
@@ -5570,6 +5580,7 @@ static struct mdio_device_id __maybe_unused micrel_tbl[] = {
 	{ PHY_ID_LAN8814, MICREL_PHY_ID_MASK },
 	{ PHY_ID_LAN8804, MICREL_PHY_ID_MASK },
 	{ PHY_ID_LAN8841, MICREL_PHY_ID_MASK },
+	{ PHY_ID_KSZ9897, MICREL_PHY_ID_MASK },
 	{ }
 };
 
diff --git a/include/linux/micrel_phy.h b/include/linux/micrel_phy.h
index 591bf5b5e8dc..81cc16dc2ddf 100644
--- a/include/linux/micrel_phy.h
+++ b/include/linux/micrel_phy.h
@@ -39,6 +39,10 @@
 #define PHY_ID_KSZ87XX		0x00221550
 
 #define	PHY_ID_KSZ9477		0x00221631
+/* Pseudo ID to specify in compatible field of device tree.
+ * Otherwise the device reports the same ID as KSZ8081 on CPU ports.
+ */
+#define	PHY_ID_KSZ9897		0x002217ff
 
 /* struct phy_device dev_flags definitions */
 #define MICREL_PHY_50MHZ_CLK	BIT(0)
-- 
2.34.1


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