| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Wed, 05 Jun 2024 16:17:53 +0200
From: Thomas Gleixner <tglx@...utronix.de>
To: Herve Codina <herve.codina@...tlin.com>, Simon Horman
<horms@...nel.org>, Sai Krishna Gajula <saikrishnag@...vell.com>, Herve
Codina <herve.codina@...tlin.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, "David S. Miller" <davem@...emloft.net>, Eric
Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, Paolo
Abeni <pabeni@...hat.com>, Lee Jones <lee@...nel.org>, Arnd Bergmann
<arnd@...db.de>, Horatiu Vultur <horatiu.vultur@...rochip.com>,
UNGLinuxDriver@...rochip.com, Andrew Lunn <andrew@...n.ch>, Heiner
Kallweit <hkallweit1@...il.com>, Russell King <linux@...linux.org.uk>,
Saravana Kannan <saravanak@...gle.com>, Bjorn Helgaas
<bhelgaas@...gle.com>, Philipp Zabel <p.zabel@...gutronix.de>, Lars
Povlsen <lars.povlsen@...rochip.com>, Steen Hegelund
<Steen.Hegelund@...rochip.com>, Daniel Machon
<daniel.machon@...rochip.com>, Alexandre Belloni
<alexandre.belloni@...tlin.com>
Cc: linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
netdev@...r.kernel.org, linux-pci@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, Allan Nielsen
<allan.nielsen@...rochip.com>, Steen Hegelund
<steen.hegelund@...rochip.com>, Luca Ceresoli <luca.ceresoli@...tlin.com>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH v2 11/19] irqchip: Add support for LAN966x OIC
On Mon, May 27 2024 at 18:14, Herve Codina wrote:
> +struct lan966x_oic_data {
> + struct irq_domain *domain;
> + void __iomem *regs;
> + int irq;
> +};
Please read Documentation/process/maintainers-tip.rst
> +static int lan966x_oic_irq_set_type(struct irq_data *data,
> + unsigned int flow_type)
Please use the 100 character limit
> +static struct lan966x_oic_chip_regs lan966x_oic_chip_regs[3] = {
> + {
> + .reg_off_ena_set = LAN966X_OIC_INTR_ENA_SET,
> + .reg_off_ena_clr = LAN966X_OIC_INTR_ENA_CLR,
> + .reg_off_sticky = LAN966X_OIC_INTR_STICKY,
> + .reg_off_ident = LAN966X_OIC_DST_INTR_IDENT(0),
> + .reg_off_map = LAN966X_OIC_DST_INTR_MAP(0),
Please make this tabular. See doc.
> +static void lan966x_oic_chip_init(struct lan966x_oic_data *lan966x_oic,
> + struct irq_chip_generic *gc,
> + struct lan966x_oic_chip_regs *chip_regs)
> +{
> + gc->reg_base = lan966x_oic->regs;
> + gc->chip_types[0].regs.enable = chip_regs->reg_off_ena_set;
> + gc->chip_types[0].regs.disable = chip_regs->reg_off_ena_clr;
> + gc->chip_types[0].regs.ack = chip_regs->reg_off_sticky;
> + gc->chip_types[0].chip.irq_startup = lan966x_oic_irq_startup;
> + gc->chip_types[0].chip.irq_shutdown = lan966x_oic_irq_shutdown;
> + gc->chip_types[0].chip.irq_set_type = lan966x_oic_irq_set_type;
> + gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg;
> + gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg;
> + gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit;
> + gc->private = chip_regs;
> +
> + /* Disable all interrupts handled by this chip */
> + irq_reg_writel(gc, ~0, chip_regs->reg_off_ena_clr);
> +}
> +
> +static void lan966x_oic_chip_exit(struct irq_chip_generic *gc)
> +{
> + /* Disable and ack all interrupts handled by this chip */
> + irq_reg_writel(gc, ~0, gc->chip_types[0].regs.disable);
~0U
> + irq_reg_writel(gc, ~0, gc->chip_types[0].regs.ack);
> +}
> +
> +static int lan966x_oic_probe(struct platform_device *pdev)
> +{
> + struct device_node *node = pdev->dev.of_node;
> + struct lan966x_oic_data *lan966x_oic;
> + struct device *dev = &pdev->dev;
> + struct irq_chip_generic *gc;
> + int ret;
> + int i;
int ret, i;
> +
> + lan966x_oic = devm_kmalloc(dev, sizeof(*lan966x_oic), GFP_KERNEL);
> + if (!lan966x_oic)
> + return -ENOMEM;
> +
> + lan966x_oic->regs = devm_platform_ioremap_resource(pdev, 0);
> + if (IS_ERR(lan966x_oic->regs))
> + return dev_err_probe(dev, PTR_ERR(lan966x_oic->regs),
> + "failed to map resource\n");
> +
> + lan966x_oic->domain = irq_domain_alloc_linear(of_node_to_fwnode(node),
> + LAN966X_OIC_NR_IRQ,
> + &irq_generic_chip_ops,
> + NULL);
> + if (!lan966x_oic->domain) {
> + dev_err(dev, "failed to create an IRQ domain\n");
> + return -EINVAL;
> + }
> +
> + lan966x_oic->irq = platform_get_irq(pdev, 0);
> + if (lan966x_oic->irq < 0) {
> + ret = dev_err_probe(dev, lan966x_oic->irq,
> + "failed to get the IRQ\n");
> + goto err_domain_free;
> + }
> +
> + ret = irq_alloc_domain_generic_chips(lan966x_oic->domain, 32, 1,
> + "lan966x-oic", handle_level_irq, 0,
> + 0, 0);
> + if (ret) {
> + dev_err_probe(dev, ret, "failed to alloc irq domain gc\n");
> + goto err_domain_free;
> + }
> +
> + /* Init chips */
> + BUILD_BUG_ON(DIV_ROUND_UP(LAN966X_OIC_NR_IRQ, 32) !=
> + ARRAY_SIZE(lan966x_oic_chip_regs));
> + for (i = 0; i < ARRAY_SIZE(lan966x_oic_chip_regs); i++) {
> + gc = irq_get_domain_generic_chip(lan966x_oic->domain, i * 32);
> + lan966x_oic_chip_init(lan966x_oic, gc,
> + &lan966x_oic_chip_regs[i]);
> + }
> +
> + irq_set_chained_handler_and_data(lan966x_oic->irq,
> + lan966x_oic_irq_handler,
> + lan966x_oic->domain);
> +
> + irq_domain_publish(lan966x_oic->domain);
> + platform_set_drvdata(pdev, lan966x_oic);
> + return 0;
This is exactly what can be avoided.
> +
> +err_domain_free:
> + irq_domain_free(lan966x_oic->domain);
> + return ret;
> +}
> +
> +static void lan966x_oic_remove(struct platform_device *pdev)
> +{
> + struct lan966x_oic_data *lan966x_oic = platform_get_drvdata(pdev);
> + struct irq_chip_generic *gc;
> + int i;
> +
> + for (i = 0; i < ARRAY_SIZE(lan966x_oic_chip_regs); i++) {
> + gc = irq_get_domain_generic_chip(lan966x_oic->domain, i * 32);
> + lan966x_oic_chip_exit(gc);
> + }
> +
> + irq_set_chained_handler_and_data(lan966x_oic->irq, NULL, NULL);
> +
> + for (i = 0; i < LAN966X_OIC_NR_IRQ; i++)
> + irq_dispose_mapping(irq_find_mapping(lan966x_oic->domain, i));
This is just wrong. You cannot remove the chip when there are still interrupts
mapped.
I just did a quick conversion to the template approach. Unsurprisingly
it removes 30 lines of boiler plate code:
+static void lan966x_oic_chip_init(struct irq_chip_generic *gc)
+{
+ struct lan966x_oic_data *lan966x_oic = gc->domain->host_data;
+ struct lan966x_oic_chip_regs *chip_regs;
+
+ gc->reg_base = lan966x_oic->regs;
+
+ chip_regs = lan966x_oic_chip_regs + gc->irq_base / 32;
+ gc->chip_types[0].regs.enable = chip_regs->reg_off_ena_set;
+ gc->chip_types[0].regs.disable = chip_regs->reg_off_ena_clr;
+ gc->chip_types[0].regs.ack = chip_regs->reg_off_sticky;
+
+ gc->chip_types[0].chip.irq_startup = lan966x_oic_irq_startup;
+ gc->chip_types[0].chip.irq_shutdown = lan966x_oic_irq_shutdown;
+ gc->chip_types[0].chip.irq_set_type = lan966x_oic_irq_set_type;
+ gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg;
+ gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg;
+ gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit;
+ gc->private = chip_regs;
+
+ /* Disable all interrupts handled by this chip */
+ irq_reg_writel(gc, ~0, chip_regs->reg_off_ena_clr);
+}
+
+static void lan966x_oic_chip_exit(struct irq_chip_generic *gc)
+{
+ /* Disable and ack all interrupts handled by this chip */
+ irq_reg_writel(gc, ~0, gc->chip_types[0].regs.disable);
+ irq_reg_writel(gc, ~0, gc->chip_types[0].regs.ack);
+}
+
+static void lan966x_oic_domain_init(struct irq_domain *d)
+{
+ struct lan966x_oic_data *lan966x_oic = d->host_data;
+
+ irq_set_chained_handler_and_data(lan966x_oic->irq, lan966x_oic_irq_handler, d);
+}
+
+static int lan966x_oic_probe(struct platform_device *pdev)
+{
+ struct irq_domain_chip_generic_info gc_info = {
+ .irqs_per_chip = 32,
+ .num_chips = 1,
+ .name = "lan966x-oic"
+ .handler = handle_level_irq,
+ .init = lan966x_oic_chip_init,
+ .destroy = lan966x_oic_chip_exit,
+ };
+
+ struct irq_domain_info info = {
+ .fwnode = of_node_to_fwnode(pdev->dev.of_node),
+ .size = LAN966X_OIC_NR_IRQ,
+ .hwirq_max = LAN966X_OIC_NR_IRQ,
+ .ops = &irq_generic_chip_ops,
+ .gc_info = &gc_info,
+ .init = lan966x_oic_domain_init,
+ };
+ struct lan966x_oic_data *lan966x_oic;
+ struct device *dev = &pdev->dev;
+
+ lan966x_oic = devm_kmalloc(dev, sizeof(*lan966x_oic), GFP_KERNEL);
+ if (!lan966x_oic)
+ return -ENOMEM;
+
+ lan966x_oic->regs = devm_platform_ioremap_resource(pdev, 0);
+ if (IS_ERR(lan966x_oic->regs))
+ return dev_err_probe(dev, PTR_ERR(lan966x_oic->regs), "failed to map resource\n");
+
+ lan966x_oic->irq = platform_get_irq(pdev, 0);
+ if (lan966x_oic->irq < 0)
+ return dev_err_probe(dev, lan966x_oic->irq, "failed to get the IRQ\n");
+
+ lan966x_oic->domain = irq_domain_instantiate(&info);
+ if (!lan966x_oic->domain)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, lan966x_oic);
+ return 0;
+}
+
+static void lan966x_oic_remove(struct platform_device *pdev)
+{
+ struct lan966x_oic_data *lan966x_oic = platform_get_drvdata(pdev);
+
+ irq_set_chained_handler_and_data(lan966x_oic->irq, NULL, NULL);
+ irq_domain_remove(lan966x_oic->domain);
+}
See?
Thanks,
tglx
Powered by blists - more mailing lists