netdev - Re: [PATCH V2 4/9] PCI/TPH: Implement a command line option to force No ST Mode

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date: Fri, 7 Jun 2024 17:32:50 +0100
From: Jonathan Cameron <Jonathan.Cameron@...wei.com>
To: Wei Huang <wei.huang2@....com>
CC: <linux-pci@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<linux-doc@...r.kernel.org>, <netdev@...r.kernel.org>, <bhelgaas@...gle.com>,
	<corbet@....net>, <davem@...emloft.net>, <edumazet@...gle.com>,
	<kuba@...nel.org>, <pabeni@...hat.com>, <alex.williamson@...hat.com>,
	<gospo@...adcom.com>, <michael.chan@...adcom.com>,
	<ajit.khaparde@...adcom.com>, <somnath.kotur@...adcom.com>,
	<andrew.gospodarek@...adcom.com>, <manoj.panicker2@....com>,
	<Eric.VanTassell@....com>, <vadim.fedorenko@...ux.dev>, <horms@...nel.org>,
	<bagasdotme@...il.com>
Subject: Re: [PATCH V2 4/9] PCI/TPH: Implement a command line option to
 force No ST Mode

On Fri, 31 May 2024 16:38:36 -0500
Wei Huang <wei.huang2@....com> wrote:

> When "No ST mode" is enabled, end-point devices can generate TPH headers
> but with all steering tags treated as zero. A steering tag of zero is
> interpreted as "using the default policy" by the root complex. This is
> essential to quantify the benefit of steering tags for some given
> workloads.

This is a good explanation. Need similar in the previous patch to
justify the disable TPH entirely.

> diff --git a/drivers/pci/pcie/tph.c b/drivers/pci/pcie/tph.c
> index 5dc533b89a33..d5f7309fdf52 100644
> --- a/drivers/pci/pcie/tph.c
> +++ b/drivers/pci/pcie/tph.c
> @@ -43,6 +43,27 @@ static int tph_set_reg_field_u32(struct pci_dev *dev, u8 offset, u32 mask,
>  	return ret;
>  }
>  
> +int tph_set_dev_nostmode(struct pci_dev *dev)
> +{
> +	int ret;
> +
> +	/* set ST Mode Select to "No ST Mode" */
> +	ret = tph_set_reg_field_u32(dev, PCI_TPH_CTRL,
> +				    PCI_TPH_CTRL_MODE_SEL_MASK,
> +				    PCI_TPH_CTRL_MODE_SEL_SHIFT,
> +				    PCI_TPH_NO_ST_MODE);
> +	if (ret)
> +		return ret;
> +
> +	/* set "TPH Requester Enable" to "TPH only" */
> +	ret = tph_set_reg_field_u32(dev, PCI_TPH_CTRL,
> +				    PCI_TPH_CTRL_REQ_EN_MASK,
> +				    PCI_TPH_CTRL_REQ_EN_SHIFT,
> +				    PCI_TPH_REQ_TPH_ONLY);

Unless these have to be two RMW operations. (if they do add a spec reference)
then this is a good example of why a field update function may not be
the right option.  We probably want to RMW once.

return tph_set_reg_field_u32()

> +
> +	return ret;
> +}
> +
>  int pcie_tph_disable(struct pci_dev *dev)
>  {
>  	return  tph_set_reg_field_u32(dev, PCI_TPH_CTRL,