netdev - Re: [PATCH net-next v9 0/6] add ethernet driver for Tehuti Networks TN40xx chips

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Date: Mon, 10 Jun 2024 17:37:56 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Hans-Frieder Vogt <hfdevel@....net>
Cc: "Russell King (Oracle)" <linux@...linux.org.uk>,
	FUJITA Tomonori <fujita.tomonori@...il.com>, netdev@...r.kernel.org,
	horms@...nel.org, kuba@...nel.org, jiri@...nulli.us,
	pabeni@...hat.com, naveenm@...vell.com, jdamato@...tly.com
Subject: Re: [PATCH net-next v9 0/6] add ethernet driver for Tehuti Networks
 TN40xx chips

> then the AQR105 seems to need the MDIO bus set at 1MHz to allow for
> detection:
> 
> @@ -1681,6 +1681,8 @@ static int tn40_probe(struct pci_dev *pd
>          goto err_unset_drvdata;
>      }
> 
> +    tn40_mdio_set_speed(priv, TN40_MDIO_SPEED_1MHZ);
> +
>      ret = tn40_mdiobus_init(priv);
>      if (ret) {
>          dev_err(&pdev->dev, "failed to initialize mdio bus.\n");
> 
> This is not needed for the x3310 and may be related to, that the AQR105
> is connected to phy address 1 on my card.

802.3 says the PHY should operate with a clock up to 2.5Mhz, and many
PHYs operate at faster speeds than 2.5Mhz. So this is likely a
symptom, not a cause. Is the PHY getting reset? Is it being given
enough time to get itself together after the reset? Maybe a delay
needs to be added.

	Andrew