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Date: Tue, 11 Jun 2024 17:56:37 -0500
From: Bjorn Helgaas <helgaas@...nel.org>
To: Bartosz Golaszewski <brgl@...ev.pl>
Cc: Liam Girdwood <lgirdwood@...il.com>, Mark Brown <broonie@...nel.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Marcel Holtmann <marcel@...tmann.org>,
	Luiz Augusto von Dentz <luiz.dentz@...il.com>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Balakrishna Godavarthi <quic_bgodavar@...cinc.com>,
	Rocky Liao <quic_rjliao@...cinc.com>, Kalle Valo <kvalo@...nel.org>,
	Jeff Johnson <jjohnson@...nel.org>,
	Bjorn Andersson <andersson@...nel.org>,
	Konrad Dybcio <konrad.dybcio@...aro.org>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Srini Kandagatla <srinivas.kandagatla@...aro.org>,
	Elliot Berman <quic_eberman@...cinc.com>,
	Caleb Connolly <caleb.connolly@...aro.org>,
	Neil Armstrong <neil.armstrong@...aro.org>,
	Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
	Alex Elder <elder@...nel.org>, linux-arm-msm@...r.kernel.org,
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
	linux-bluetooth@...r.kernel.org, netdev@...r.kernel.org,
	linux-wireless@...r.kernel.org, ath11k@...ts.infradead.org,
	Jeff Johnson <quic_jjohnson@...cinc.com>,
	ath12k@...ts.infradead.org, linux-pm@...r.kernel.org,
	linux-pci@...r.kernel.org,
	Bartosz Golaszewski <bartosz.golaszewski@...aro.org>,
	kernel@...cinc.com, Amit Pundir <amit.pundir@...aro.org>
Subject: Re: [PATCH v8 15/17] PCI/pwrctl: add PCI power control core code

On Wed, Jun 05, 2024 at 08:05:06PM +0200, Bartosz Golaszewski wrote:
> On Wed, Jun 5, 2024 at 7:58 PM Bjorn Helgaas <helgaas@...nel.org> wrote:
> >
> > On Tue, May 28, 2024 at 09:03:23PM +0200, Bartosz Golaszewski wrote:
> > > From: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
> > >
> > > Some PCI devices must be powered-on before they can be detected on the
> > > bus. Introduce a simple framework reusing the existing PCI OF
> > > infrastructure.
> > >
> > > The way this works is: a DT node representing a PCI device connected to
> > > the port can be matched against its power control platform driver. If
> > > the match succeeds, the driver is responsible for powering-up the device
> > > and calling pcie_pwrctl_device_set_ready() which will trigger a PCI bus
> >
> > s/pcie_pwrctl_device_set_ready/pci_pwrctl_device_set_ready/
> >
> 
> Ah that's a leftover from when it was PCIe specific. Thanks.

With that typo fixed and s/add PCI/Add/ in subject,

Acked-by: Bjorn Helgaas <bhelgaas@...gle.com>

> > > rescan as well as subscribe to PCI bus notifications.
> > >
> > > When the device is detected and created, we'll make it consume the same
> > > DT node that the platform device did. When the device is bound, we'll
> > > create a device link between it and the parent power control device.

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