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Date: Fri, 14 Jun 2024 17:30:50 +0100
From: Simon Horman <horms@...nel.org>
To: Sean Anderson <sean.anderson@...ux.dev>
Cc: Radhey Shyam Pandey <radhey.shyam.pandey@....com>,
	netdev@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	Michal Simek <michal.simek@....com>,
	Jakub Kicinski <kuba@...nel.org>,
	Russell King <linux@...linux.org.uk>,
	Paolo Abeni <pabeni@...hat.com>, Eric Dumazet <edumazet@...gle.com>,
	linux-kernel@...r.kernel.org,
	"David S . Miller" <davem@...emloft.net>
Subject: Re: [PATCH net-next 3/3] net: xilinx: axienet: Add statistics support

On Mon, Jun 10, 2024 at 07:10:22PM -0400, Sean Anderson wrote:
> Add support for reading the statistics counters, if they are enabled.
> The counters may be 64-bit, but we can't detect this as there's no
> ability bit for it and the counters are read-only. Therefore, we assume
> the counters are 32-bits. To ensure we don't miss an overflow, we need
> to read all counters at regular intervals, configurable with
> stats-block-usecs. This should be often enough to ensure the bytes
> counters don't wrap at 2.5 Gbit/s.
> 
> Another complication is that the counters may be reset when the device
> is reset (depending on configuration). To ensure the counters persist
> across link up/down (including suspend/resume), we maintain our own
> 64-bit versions along with the last counter value we saw. Because we
> might wait up to 100 ms for the reset to complete, we use a mutex to
> protect writing hw_stats. We can't sleep in ndo_get_stats64, so we use a
> u64_stats_sync to protect readers.
> 
> We can't use the byte counters for either get_stats64 or
> get_eth_mac_stats. This is because the byte counters include everything
> in the frame (destination address to FCS, inclusive). But
> rtnl_link_stats64 wants bytes excluding the FCS, and
> ethtool_eth_mac_stats wants to exclude the L2 overhead (addresses and
> length/type).
> 
> Signed-off-by: Sean Anderson <sean.anderson@...ux.dev>
> ---
> 
>  drivers/net/ethernet/xilinx/xilinx_axienet.h  |  81 ++++++
>  .../net/ethernet/xilinx/xilinx_axienet_main.c | 267 +++++++++++++++++-
>  2 files changed, 345 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet.h b/drivers/net/ethernet/xilinx/xilinx_axienet.h

...

> @@ -434,6 +502,11 @@ struct skbuf_dma_descriptor {
>   * @tx_packets: TX packet count for statistics
>   * @tx_bytes:	TX byte count for statistics
>   * @tx_stat_sync: Synchronization object for TX stats
> + * @hw_last_counter: Last-seen value of each statistic
> + * @hw_stats: Interface statistics periodically updated from hardware counters
> + * @hw_stats_sync: Synchronization object for @hw_stats

nit: s/hw_stats_sync/hw_stat_sync/

     Flagged by kernel-doc -none

> + * @stats_lock: Lock for writing @hw_stats and @hw_last_counter
> + * @stats_work: Work for reading the hardware statistics counters
>   * @dma_err_task: Work structure to process Axi DMA errors
>   * @tx_irq:	Axidma TX IRQ number
>   * @rx_irq:	Axidma RX IRQ number
> @@ -452,6 +525,7 @@ struct skbuf_dma_descriptor {
>   * @coalesce_usec_rx:	IRQ coalesce delay for RX
>   * @coalesce_count_tx:	Store the irq coalesce on TX side.
>   * @coalesce_usec_tx:	IRQ coalesce delay for TX
> + * @coalesce_usec_stats: Delay between hardware statistics refreshes
>   * @use_dmaengine: flag to check dmaengine framework usage.
>   * @tx_chan:	TX DMA channel.
>   * @rx_chan:	RX DMA channel.
> @@ -505,6 +579,12 @@ struct axienet_local {
>  	u64_stats_t tx_bytes;
>  	struct u64_stats_sync tx_stat_sync;
>  
> +	u32 hw_last_counter[STAT_COUNT];
> +	u64_stats_t hw_stats[STAT_COUNT];
> +	struct u64_stats_sync hw_stat_sync;
> +	struct mutex stats_lock;
> +	struct delayed_work stats_work;
> +
>  	struct work_struct dma_err_task;
>  
>  	int tx_irq;

...

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