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Date: Thu, 20 Jun 2024 05:37:24 +0000
From: Omer Shpigelman <oshpigelman@...ana.ai>
To: Jiri Pirko <jiri@...nulli.us>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-rdma@...r.kernel.org" <linux-rdma@...r.kernel.org>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
        "ogabbay@...nel.org" <ogabbay@...nel.org>,
        Zvika Yehudai <zyehudai@...ana.ai>
Subject: Re: [PATCH 00/15] Introduce HabanaLabs network drivers

On 6/19/24 19:33, Jiri Pirko wrote:
> [You don't often get email from jiri@...nulli.us. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
> 
> Thu, Jun 13, 2024 at 10:21:53AM CEST, oshpigelman@...ana.ai wrote:
>> This patch set implements the HabanaLabs network drivers for Gaudi2 ASIC
>> which is designed for scaling of AI neural networks training.
>> The patch set includes the common code which is shared by all Gaudi ASICs
>> and the Gaudi2 ASIC specific code. Newer ASICs code will be followed.
>> All of these network drivers are modeled as an auxiliary devices to the
>> parent driver.
>>
>> The newly added drivers are Core Network (CN), Ethernet and InfiniBand.
>> All of these drivers are based on the existing habanalabs driver which
>> serves as the compute driver and the entire platform.
>> The habanalabs driver probes the network drivers which configure the
>> relevant NIC HW of the device. In addition, it continuously communicates
>> with the CN driver for providing some services which are not NIC specific
>> e.g. PCI, MMU, FW communication etc.
>>
>> See the drivers scheme at:
>> Documentation/networking/device_drivers/ethernet/intel/hbl.rst
>>
>> The CN driver is both a parent and a son driver. It serves as the common
>> layer of many shared operations that are required by both EN and IB
>> drivers.
>>
>> The Gaudi2 NIC HW is composed of 48 physical lanes, 56Gbps each. Each pair
>> of lanes represent a 100Gbps logical port.
> 
> What do you mean by "logical port"? Is it a separate netdevice. So you
> have 24 netdevices visible on the system? How the physical port/ports
> look like? How do you model that in devlink? Do you support port
> splitting?
> 

I first described our HW. It is composed of 48 physical lanes. But each
netdevice (meaning a "logical port") is mapped to a pair of these, so we
end up with 24 netdevices visible on the system.
Technically we could work in a mode where we have 48 netdevices visible on
the system and each netdevice is mapped to a single physical lane, but we
have no use case for that.
We are not interagted to devlink, we didn't find a need for that in our
use cases.

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