netdev - Re: STMMAC driver CPU stall warning

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Message-ID: <CA+V-a8vOJmwbK6Oauv4=2nRXZcOVR2GDH8_FBQQ1dpE8298LKQ@mail.gmail.com>
Date: Tue, 25 Jun 2024 10:30:41 +0100
From: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To: Jose Abreu <Jose.Abreu@...opsys.com>
Cc: Alexandre Torgue <alexandre.torgue@...s.st.com>, netdev <netdev@...r.kernel.org>
Subject: Re: STMMAC driver CPU stall warning

Hi Jose,

On Tue, Jun 25, 2024 at 10:20 AM Jose Abreu <Jose.Abreu@...opsys.com> wrote:
>
> From: Lad, Prabhakar <prabhakar.csengg@...il.com>
> Date: Mon, Jun 24, 2024 at 10:25:38
>
<snip>
> > Please let me know if you need me to try anything or provide more
> > debug information.
>
> Can you also share the relevant DT bindings?

I am yet to write a DT binding file for this. Below is how I use it on
the RZ/V2H SoC.

SoC DTSI:

eth0: ethernet@...30000 {
    compatible = "renesas,r9a09g057-gbeth", "snps,dwmac-5.20";
    reg = <0 0x15c30000 0 0x10000>;
    interrupts = <....>;
    interrupt-names = "...";
    clocks =  <...>;
    clock-names = "...";
    resets = <...>;
    #address-cells = <1>;
    #size-cells = <0>;
    status = "disabled";
    snps,multicast-filter-bins = <256>;
    snps,perfect-filter-entries = <128>;
    rx-fifo-depth = <8192>;
    tx-fifo-depth = <8192>;
    snps,fixed-burst;
    snps,no-pbl-x8;
    snps,force_thresh_dma_mode;
    snps,axi-config = <&stmmac_axi_setup0>;
    snps,mtl-rx-config = <&mtl_rx_setup0>;
    snps,mtl-tx-config = <&mtl_tx_setup0>;
    snps,en-tx-lpi-clockgating;
    snps,txpbl = <32>;
    snps,rxpbl = <32>;

    stmmac_axi_setup0: stmmac-axi-config {
        snps,lpi_en;
        snps,wr_osr_lmt = <0xf>;
        snps,rd_osr_lmt = <0xf>;
        snps,blen = <16 8 4 0 0 0 0>;
    };

    mtl_rx_setup0: rx-queues-config {
        snps,rx-queues-to-use = <4>;
        snps,rx-sched-sp;

        queue0 {
            snps,dcb-algorithm;
            snps,priority = <0x1>;
            snps,map-to-dma-channel = <0>;
        };

        queue1 {
            snps,dcb-algorithm;
            snps,priority = <0x2>;
            snps,map-to-dma-channel = <1>;
        };

        queue2 {
            snps,dcb-algorithm;
            snps,priority = <0x4>;
            snps,map-to-dma-channel = <2>;
        };

        queue3 {
            snps,dcb-algorithm;
            snps,priority = <0x8>;
            snps,map-to-dma-channel = <3>;
        };
    };

    mtl_tx_setup0: tx-queues-config {
        snps,tx-queues-to-use = <4>;
        snps,tx-sched-sp;

        queue0 {
            snps,dcb-algorithm;
            snps,priority = <0x1>;
        };

        queue1 {
            snps,dcb-algorithm;
            snps,priority = <0x2>;
        };

        queue2 {
            snps,dcb-algorithm;
            snps,priority = <0x4>;
        };

        queue3 {
            snps,dcb-algorithm;
            snps,priority = <0x1>;
        };
    };

    mdio {
        compatible = "snps,dwmac-mdio";
        #address-cells = <1>;
        #size-cells = <0>;
    };
};

Board DTS:
&eth0 {
    phy-handle = <&phy0>;
    phy-mode = "rgmii-id";
    status = "okay";

    mdio {
        phy0: ethernet-phy@0 {
            compatible = "ethernet-phy-id0022.1640",
                     "ethernet-phy-ieee802.3-c22";
            reg = <0>;
            rxc-skew-psec = <1400>;
            txc-skew-psec = <1400>;
            rxdv-skew-psec = <0>;
            txdv-skew-psec = <0>;
            rxd0-skew-psec = <0>;
            rxd1-skew-psec = <0>;
            rxd2-skew-psec = <0>;
            rxd3-skew-psec = <0>;
            txd0-skew-psec = <0>;
            txd1-skew-psec = <0>;
            txd2-skew-psec = <0>;
            txd3-skew-psec = <0>;
        };
    };
};

Cheers,
Prabhakar