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Message-ID: <20240627151127.284884-9-karol.kolacinski@intel.com>
Date: Thu, 27 Jun 2024 17:09:24 +0200
From: Karol Kolacinski <karol.kolacinski@...el.com>
To: intel-wired-lan@...ts.osuosl.org
Cc: netdev@...r.kernel.org,
anthony.l.nguyen@...el.com,
przemyslaw.kitszel@...el.com,
Karol Kolacinski <karol.kolacinski@...el.com>
Subject: [PATCH iwl-next 0/7] ice: Cleanup and refactor PTP pin handling
This series cleans up current PTP GPIO pin handling, fixes minor bugs,
refactors implementation for all products, introduces SDP (Software
Definable Pins) for E825C and implements reading SDP section from NVM
for E810 products.
Karol Kolacinski (5):
ice: Implement ice_ptp_pin_desc
ice: Add SDPs support for E825C
ice: Align E810T GPIO to other products
ice: Cache perout/extts requests and check flags
ice: Disable shared pin on E810 on setfunc
Sergey Temerkhanov (1):
ice: Enable 1PPS out from CGU for E825C products
Yochai Hagvi (1):
ice: Read SDP section from NVM for pin definitions
.../net/ethernet/intel/ice/ice_adminq_cmd.h | 9 +
drivers/net/ethernet/intel/ice/ice_gnss.c | 4 +-
drivers/net/ethernet/intel/ice/ice_ptp.c | 1129 +++++++++--------
drivers/net/ethernet/intel/ice/ice_ptp.h | 119 +-
.../net/ethernet/intel/ice/ice_ptp_consts.h | 2 +-
drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 101 +-
drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 72 +-
7 files changed, 800 insertions(+), 636 deletions(-)
base-commit: 6a788e1f6ddc6750a553314403136b1be9301cf5
--
2.45.2
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