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Message-ID: <86bf3922-e38f-4230-9a9b-1461f36d85a5@intel.com>
Date: Thu, 27 Jun 2024 11:00:25 +0200
From: Przemek Kitszel <przemyslaw.kitszel@...el.com>
To: Michael Chan <michael.chan@...adcom.com>
CC: <netdev@...r.kernel.org>, <edumazet@...gle.com>, <kuba@...nel.org>,
	<pabeni@...hat.com>, <pavan.chebbi@...adcom.com>,
	<andrew.gospodarek@...adcom.com>, <richardcochran@...il.com>,
	<davem@...emloft.net>
Subject: Re: [PATCH net-next 01/10] bnxt_en: Add new TX timestamp completion
 definitions

On 6/26/24 18:42, Michael Chan wrote:
> The new BCM5760X chips will generate this new TX timestamp completion
> when a TX packet's timestamp has been taken right before transmission.

Tx

> The driver logic to retreive the timestamp will be added in the next

retrieve

> few patches.
> 
> Reviewed-by: Pavan Chebbi <pavan.chebbi@...adcom.com>
> Reviewed-by: Andy Gospodarek <andrew.gospodarek@...adcom.com>
> Signed-off-by: Michael Chan <michael.chan@...adcom.com>
> ---
>   drivers/net/ethernet/broadcom/bnxt/bnxt.h | 26 +++++++++++++++++++++++
>   1 file changed, 26 insertions(+)
> 
> diff --git a/drivers/net/ethernet/broadcom/bnxt/bnxt.h b/drivers/net/ethernet/broadcom/bnxt/bnxt.h
> index 9cf0acfa04e5..d3ad73d4c00a 100644
> --- a/drivers/net/ethernet/broadcom/bnxt/bnxt.h
> +++ b/drivers/net/ethernet/broadcom/bnxt/bnxt.h
> @@ -181,6 +181,32 @@ struct tx_cmp {
>   #define TX_CMP_SQ_CONS_IDX(txcmp)					\
>   	(le32_to_cpu((txcmp)->sq_cons_idx) & TX_CMP_SQ_CONS_IDX_MASK)
>   
> +struct tx_ts_cmp {
> +	__le32 tx_ts_cmp_flags_type;
> +	#define TX_TS_CMP_FLAGS_ERROR				(1 << 6)

those should be BIT(6)

> +	#define TX_TS_CMP_FLAGS_TS_TYPE				(1 << 7)
> +	 #define TX_TS_CMP_FLAGS_TS_TYPE_PM			 (0 << 7)

weird way to spell 0

> +	 #define TX_TS_CMP_FLAGS_TS_TYPE_PA			 (1 << 7)
> +	#define TX_TS_CMP_FLAGS_TS_FALLBACK			(1 << 8)
> +	#define TX_TS_CMP_TS_SUB_NS				(0xf << 12)

GENMASK(),
please use through the series, same for BIT()

> +	#define TX_TS_CMP_TS_NS_MID				(0xffff << 16)
> +	#define TX_TS_CMP_TS_NS_MID_SFT				16
> +	u32 tx_ts_cmp_opaque;
> +	__le32 tx_ts_cmp_errors_v;
> +	#define TX_TS_CMP_V					(1 << 0)
> +	#define TX_TS_CMP_TS_INVALID_ERR			(1 << 10)
> +	__le32 tx_ts_cmp_ts_ns_lo;
> +};
> +
> +#define BNXT_GET_TX_TS_48B_NS(tscmp)					\
> +	(le32_to_cpu((tscmp)->tx_ts_cmp_ts_ns_lo) |			\
> +	 ((u64)(le32_to_cpu((tscmp)->tx_ts_cmp_flags_type) &		\
> +	  TX_TS_CMP_TS_NS_MID) << TX_TS_CMP_TS_NS_MID_SFT))
> +
> +#define BNXT_TX_TS_ERR(tscmp)						\
> +	(((tscmp)->tx_ts_cmp_flags_type & cpu_to_le32(TX_TS_CMP_FLAGS_ERROR)) &&\
> +	 ((tscmp)->tx_ts_cmp_errors_v & cpu_to_le32(TX_TS_CMP_TS_INVALID_ERR)))
> +
>   struct rx_cmp {
>   	__le32 rx_cmp_len_flags_type;
>   	#define RX_CMP_CMP_TYPE					(0x3f << 0)


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