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Date: Tue, 2 Jul 2024 13:30:21 -0700
From: Alexander Duyck <alexander.duyck@...il.com>
To: Andrew Lunn <andrew@...n.ch>
Cc: "Russell King (Oracle)" <linux@...linux.org.uk>, netdev@...r.kernel.org, 
	Alexander Duyck <alexanderduyck@...com>, kuba@...nel.org, davem@...emloft.net, 
	pabeni@...hat.com, edumazet@...gle.com, kernel-team@...a.com
Subject: Re: [net-next PATCH v3 11/15] eth: fbnic: Add link detection

On Tue, Jul 2, 2024 at 12:33 PM Andrew Lunn <andrew@...n.ch> wrote:
>
> > I was actually going to reach out to you guys about that. For this
> > patch set I think it may be needed as I have no way to sort out
> > 50000baseCR2 (NRZ, 2 lanes) vs 50000baseCR (PAM4, 1 lane) in the
> > current phylink code for setting the mac link up. I was wondering if
> > you had any suggestions on how I might resolve that?
> >
> > Basically I have a laundry list of things that I was planning to start
> > on in the follow on sets:
> >
> > 1. I still need to add CGMII support as technically we are using a
> > different interface mode to support 100Gbps. Seems like I can mostly
> > just do a find/insert based on the PHY_INTERFACE_MODE_XLGMII to add
> > that so it should be straight forward.
> >
> > 2. We have 2 PCS blocks we are working with to set up the CR2 modes. I
> > was wondering if I should just be writing my PCS code to be handling
> > the merged pair of IP or if I should look at changing the phylink code
> > to support more than one PCS device servicing a given connection?
> >
> > 3. The FEC config is integral to the PCS and MAC setup on my device. I
> > was wondering why FEC isn't included as a part of the phylink code?
> > Are there any plans to look at doing that? Otherwise what is the
> > recommended setup for handling that as it can be negotiated via
> > autoneg for our 25G and 50G-R2 links so I will need to work out how to
> > best go after that.
>
> You are pushing the envelope for current phylink. So far, i don't
> think it has been used for anything more than 10G. Although 10GBase-KR
> does have FEC, nobody has needed it yet. So this is something you
> should extend phylink with.
>
> As for multiple PCS for one connection, is this common, or special to
> your hardware?

I would think it is common. Basically once you get over 10G you start
seeing all these XXXXXbase[CDKLS]R[248] speeds advertised and usually
the 2/4/8 represents the number of lanes being used. I would think
most hardware probably has a PCS block per lane as they can be
configured separately and in our case anyway you can use just the one
lane mode and then you only need to setup 1 lane, or you can use the 2
lane mode and you need to setup 2.

Some of our logic is merged like I mentioned though so maybe it would
make more sense to just merge the lanes. Anyway I guess I can start
working on that code for the next patch set. I will look at what I
need to do to extend the logic. For now I might be able to get by with
just dropping support for 50R1 since that isn't currently being used
as a default.

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