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Message-ID: <20240717205511.2541693-1-wei.huang2@amd.com>
Date: Wed, 17 Jul 2024 15:55:01 -0500
From: Wei Huang <wei.huang2@....com>
To: <linux-pci@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-doc@...r.kernel.org>, <netdev@...r.kernel.org>
CC: <Jonathan.Cameron@...wei.com>, <helgaas@...nel.org>, <corbet@....net>,
<davem@...emloft.net>, <edumazet@...gle.com>, <kuba@...nel.org>,
<pabeni@...hat.com>, <alex.williamson@...hat.com>, <gospo@...adcom.com>,
<michael.chan@...adcom.com>, <ajit.khaparde@...adcom.com>,
<somnath.kotur@...adcom.com>, <andrew.gospodarek@...adcom.com>,
<manoj.panicker2@....com>, <Eric.VanTassell@....com>, <wei.huang2@....com>,
<vadim.fedorenko@...ux.dev>, <horms@...nel.org>, <bagasdotme@...il.com>,
<bhelgaas@...gle.com>
Subject: [PATCH V3 00/10] PCIe TPH and cache direct injection support
Hi All,
TPH (TLP Processing Hints) is a PCIe feature that allows endpoint devices to
provide optimization hints for requests that target memory space. These hints,
in a format called steering tag (ST), are provided in the requester's TLP
headers and allow the system hardware, including the Root Complex, to
optimize the utilization of platform resources for the requests.
Upcoming AMD hardware implement a new Cache Injection feature that leverages
TPH. Cache Injection allows PCIe endpoints to inject I/O Coherent DMA writes
directly into an L2 within the CCX (core complex) closest to the CPU core that
will consume it. This technology is aimed at applications requiring high
performance and low latency, such as networking and storage applications.
This series introduces generic TPH support in Linux, allowing STs to be
retrieved from ACPI _DSM (as defined by ACPI) and used by PCIe endpoint
drivers as needed. As a demonstration, it includes an example usage in the
Broadcom BNXT driver. When running on Broadcom NICs with the appropriate
firmware, Cache Injection shows substantial memory bandwidth savings and
better network bandwidth using real-world benchmarks. This solution is
vendor-neutral, as both TPH and ACPI _DSM are industry standards.
V2->V3:
* Rebase on top of pci/next tree (tag: pci-v6.11-changes)
* Redefine PCI TPH registers (pci_regs.h) without breaking uapi
* Fix commit subjects/messages for kernel options (Jonathan and Bjorn)
* Break API functions into three individual patches for easy review
* Rewrite lots of code in tph.c/tph.h based on feedback (Jonathan and Bjorn)
V1->V2:
* Rebase on top of pci.git/for-linus (6.10-rc1)
* Address mismatched data types reported by Sparse (Sparse check passed)
* Add a new API, pcie_tph_intr_vec_supported(), for checking IRQ mode support
* Skip bnxt affinity notifier registration if pcie_tph_intr_vec_supported()=false
* Minor fixes in bnxt driver (i.e. warning messages)
Manoj Panicker (1):
bnxt_en: Add TPH support in BNXT driver
Michael Chan (1):
bnxt_en: Pass NQ ID to the FW when allocating RX/RX AGG rings
Wei Huang (8):
PCI: Introduce PCIe TPH support framework
PCI: Add TPH related register definition
PCI/TPH: Add pci=notph to prevent use of TPH
PCI/TPH: Add pci=nostmode to force No ST Mode
PCI/TPH: Introduce API to check interrupt vector mode support
PCI/TPH: Introduce API to retrieve TPH steering tags from ACPI
PCI/TPH: Introduce API to update TPH steering tags in PCIe devices
PCI/TPH: Add TPH documentation
Documentation/PCI/index.rst | 1 +
Documentation/PCI/tph.rst | 57 +++
.../admin-guide/kernel-parameters.txt | 2 +
Documentation/driver-api/pci/pci.rst | 3 +
drivers/net/ethernet/broadcom/bnxt/bnxt.c | 62 ++-
drivers/net/ethernet/broadcom/bnxt/bnxt.h | 4 +
drivers/pci/pci-driver.c | 12 +-
drivers/pci/pci.c | 24 +
drivers/pci/pci.h | 6 +
drivers/pci/pcie/Kconfig | 11 +
drivers/pci/pcie/Makefile | 1 +
drivers/pci/pcie/tph.c | 443 ++++++++++++++++++
drivers/pci/probe.c | 1 +
include/linux/pci-tph.h | 42 ++
include/linux/pci.h | 6 +
include/uapi/linux/pci_regs.h | 28 +-
16 files changed, 696 insertions(+), 7 deletions(-)
create mode 100644 Documentation/PCI/tph.rst
create mode 100644 drivers/pci/pcie/tph.c
create mode 100644 include/linux/pci-tph.h
--
2.45.1
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