netdev - Re: [PATCH net v2 1/2] net: dsa: mv88e6xxx: Limit chip-wide frame size config to CPU ports

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Message-ID: <20240717114600.a3dprto55puhfpjg@skbuf>
Date: Wed, 17 Jul 2024 14:46:00 +0300
From: Vladimir Oltean <olteanv@...il.com>
To: Martin Willi <martin@...ongswan.org>
Cc: Andrew Lunn <andrew@...n.ch>, Florian Fainelli <f.fainelli@...il.com>,
	Chris Packham <chris.packham@...iedtelesis.co.nz>,
	Murali Krishna Policharla <murali.policharla@...adcom.com>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	netdev@...r.kernel.org
Subject: Re: [PATCH net v2 1/2] net: dsa: mv88e6xxx: Limit chip-wide frame
 size config to CPU ports

On Wed, Jul 17, 2024 at 11:08:19AM +0200, Martin Willi wrote:
> Marvell chips not supporting per-port jumbo frame size configurations use
> a chip-wide frame size configuration. In the commit referenced with the
> Fixes tag, the setting is applied just for the last port changing its MTU.
> 
> While configuring CPU ports accounts for tagger overhead, user ports do
> not. When setting the MTU for a user port, the chip-wide setting is
> reduced to not include the tagger overhead, resulting in an potentially
> insufficient maximum frame size for the CPU port. Specifically, sending
> full-size frames from the CPU port on a MV88E6097 having a user port MTU
> of 1500 bytes results in dropped frames.
> 
> As, by design, the CPU port MTU is adjusted for any user port change,
> apply the chip-wide setting only for CPU ports.
> 
> Fixes: 1baf0fac10fb ("net: dsa: mv88e6xxx: Use chip-wide max frame size for MTU")
> Suggested-by: Vladimir Oltean <olteanv@...il.com>
> Signed-off-by: Martin Willi <martin@...ongswan.org>
> ---

Reviewed-by: Vladimir Oltean <olteanv@...il.com>