netdev - Re: [PATCH V3 02/10] PCI: Add TPH related register definition

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Message-ID: <20240723223313.GA779521@bhelgaas>
Date: Tue, 23 Jul 2024 17:33:13 -0500
From: Bjorn Helgaas <helgaas@...nel.org>
To: Wei Huang <wei.huang2@....com>
Cc: linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-doc@...r.kernel.org, netdev@...r.kernel.org,
	Jonathan.Cameron@...wei.com, corbet@....net, davem@...emloft.net,
	edumazet@...gle.com, kuba@...nel.org, pabeni@...hat.com,
	alex.williamson@...hat.com, gospo@...adcom.com,
	michael.chan@...adcom.com, ajit.khaparde@...adcom.com,
	somnath.kotur@...adcom.com, andrew.gospodarek@...adcom.com,
	manoj.panicker2@....com, Eric.VanTassell@....com,
	vadim.fedorenko@...ux.dev, horms@...nel.org, bagasdotme@...il.com,
	bhelgaas@...gle.com
Subject: Re: [PATCH V3 02/10] PCI: Add TPH related register definition

On Wed, Jul 17, 2024 at 03:55:03PM -0500, Wei Huang wrote:
> Linux has some basic, but incomplete, definition for the TPH Requester
> capability registers. Also the control registers of TPH Requester and
> the TPH Completer are missing. Add all required definitions to support
> TPH without changing the existing uapi.

> +#define  PCI_TPH_CAP_NO_ST	0x00000001 /* no ST mode supported */
> +#define  PCI_TPH_CAP_INT_VEC	0x00000002 /* interrupt vector mode supported */
> +#define  PCI_TPH_CAP_DS		0x00000004 /* device specific mode supported */

Capitalize to match spec usage.  Also below.

> +#define  PCI_TPH_CAP_EXT_TPH	0x00000100 /* extended TPH requestor supported */

s/requestor/requester/

> +#define  PCI_TPH_CAP_LOC_MASK	0x00000600 /* location mask */
> +#define   PCI_TPH_LOC_NONE	0x00000000 /* no location */
> +#define   PCI_TPH_LOC_CAP	0x00000200 /* in capability */
> +#define   PCI_TPH_LOC_MSIX	0x00000400 /* in MSI-X */
>  #define PCI_TPH_CAP_ST_MASK	0x07FF0000	/* ST table mask */
>  #define PCI_TPH_CAP_ST_SHIFT	16	/* ST table shift */
>  #define PCI_TPH_BASE_SIZEOF	0xc	/* size with no ST table */
>  
> +#define PCI_TPH_CTRL		8	/* control register */
> +#define  PCI_TPH_CTRL_MODE_SEL_MASK	0x00000007 /* ST mode select mask */
> +#define   PCI_TPH_NO_ST_MODE		0x0 /*  no ST mode */
> +#define   PCI_TPH_INT_VEC_MODE		0x1 /*  interrupt vector mode */
> +#define   PCI_TPH_DEV_SPEC_MODE		0x2 /*  device specific mode */
> +#define  PCI_TPH_CTRL_REQ_EN_MASK	0x00000300 /* TPH requester mask */
> +#define   PCI_TPH_REQ_DISABLE		0x0 /*  no TPH request allowed */
> +#define   PCI_TPH_REQ_TPH_ONLY		0x1 /*  8-bit TPH tags allowed */
> +#define   PCI_TPH_REQ_EXT_TPH		0x3 /*  16-bit TPH tags allowed */
> +
>  /* Downstream Port Containment */
>  #define PCI_EXP_DPC_CAP			0x04	/* DPC Capability */
>  #define PCI_EXP_DPC_IRQ			0x001F	/* Interrupt Message Number */
> -- 
> 2.45.1
>