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Message-Id: <20240730033053.4092132-4-jacobe.zang@wesion.com>
Date: Tue, 30 Jul 2024 11:30:51 +0800
From: Jacobe Zang <jacobe.zang@...ion.com>
To: robh@...nel.org,
krzk+dt@...nel.org,
heiko@...ech.de,
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Jacobe Zang <jacobe.zang@...ion.com>
Subject: [PATCH v5 3/5] arm64: dts: rockchip: Add AP6275P wireless support to Khadas Edge 2
Khadas Edge2 uses the PCI-e Ampak AP6275P 2T2R Wi-Fi 6 module. The
pcie@0 node can be used as Bridge1, so the wifi@0 node is used as a
device under the Bridge1.
Co-developed-by: Muhammed Efe Cetin <efectn@...tonmail.com>
Signed-off-by: Muhammed Efe Cetin <efectn@...tonmail.com>
Signed-off-by: Jacobe Zang <jacobe.zang@...ion.com>
---
.../boot/dts/rockchip/rk3588s-khadas-edge2.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
index dbddfc3bb4641..b80a552dad883 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts
@@ -283,6 +283,22 @@ &pcie2x1l2 {
reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie_wl>;
status = "okay";
+
+ pcie@0,0 {
+ reg = <0x400000 0 0 0 0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ device_type = "pci";
+ bus-range = <0x40 0x4f>;
+
+ wifi: wifi@0,0 {
+ compatible = "pci14e4,449d";
+ reg = <0x410000 0 0 0 0>;
+ clocks = <&hym8563>;
+ clock-names = "lpo";
+ };
+ };
};
&pwm11 {
--
2.34.1
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