netdev - Re: [PATCH net-next v3 1/3] dt-bindings: net: fec: add pps channel property

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Message-ID: <20240809144914.GA418297@francesco-nb>
Date: Fri, 9 Aug 2024 16:49:14 +0200
From: Francesco Dolcini <francesco@...cini.it>
To: Conor Dooley <conor@...nel.org>
Cc: Francesco Dolcini <francesco@...cini.it>, Wei Fang <wei.fang@....com>,
	Shenwei Wang <shenwei.wang@....com>,
	Clark Wang <xiaoning.wang@....com>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
	Linux Team <linux-imx@....com>,
	Francesco Dolcini <francesco.dolcini@...adex.com>,
	imx@...ts.linux.dev, netdev@...r.kernel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH net-next v3 1/3] dt-bindings: net: fec: add pps channel
 property

On Fri, Aug 09, 2024 at 03:27:39PM +0100, Conor Dooley wrote:
> On Fri, Aug 09, 2024 at 11:48:02AM +0200, Francesco Dolcini wrote:
> > From: Francesco Dolcini <francesco.dolcini@...adex.com>
> > 
> > Add fsl,pps-channel property to specify to which timer instance the PPS
> > channel is connected to.
> 
> In the driver patch you say "depending on the soc ... might be routed to
> different timer instances", why is a soc-specific compatible
> insufficient to determine which timer instance is in use?
> I think I know what you mean, but I'm not 100%.
> 
> That said, the explanation in the driver patch is better than the one
> here, so a commit message improvement is required.

This was clarified by NXP during the discussion on this series [1] and the
commit messages were not amended to take this new information into
account, my fault.

I would propose something like this here:

```
Add fsl,pps-channel property to select where to connect the PPS
signal. This depends on the internal SoC routing and on the board, for
example on the i.MX8 SoC it can be connected to an external pin (using
channel 1) or to internal eDMA as DMA request (channel 0).
```

Francesco

[1] https://lore.kernel.org/all/ZrPYOWA3FESx197L@lizhi-Precision-Tower-5810/