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Message-ID: <0451de33-3256-4c6b-a6ac-ca99b946fb15@lunn.ch>
Date: Sun, 11 Aug 2024 18:09:03 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Parthiban Veerasooran <Parthiban.Veerasooran@...rochip.com>
Cc: davem@...emloft.net, edumazet@...gle.com, kuba@...nel.org,
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Subject: Re: [PATCH net-next v5 13/14] microchip: lan865x: add driver support
for Microchip's LAN865X MAC-PHY
On Tue, Jul 30, 2024 at 09:39:05AM +0530, Parthiban Veerasooran wrote:
> The LAN8650/1 is designed to conform to the OPEN Alliance 10BASE-T1x
> MAC-PHY Serial Interface specification, Version 1.1. The IEEE Clause 4
> MAC integration provides the low pin count standard SPI interface to any
> microcontroller therefore providing Ethernet functionality without
> requiring MAC integration within the microcontroller. The LAN8650/1
> operates as an SPI client supporting SCLK clock rates up to a maximum of
> 25 MHz. This SPI interface supports the transfer of both data (Ethernet
> frames) and control (register access).
>
> By default, the chunk data payload is 64 bytes in size. The Ethernet
> Media Access Controller (MAC) module implements a 10 Mbps half duplex
> Ethernet MAC, compatible with the IEEE 802.3 standard. 10BASE-T1S
> physical layer transceiver integrated is into the LAN8650/1. The PHY and
> MAC are connected via an internal Media Independent Interface (MII).
I see there are some fixes needed for Multicast, but otherwise this
looks O.K.
Please send a new version with the fixes, and then i think we are
ready for this to be merged.
Andrew
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