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Message-ID: <20240816110928.1a75d223@kernel.org>
Date: Fri, 16 Aug 2024 11:09:28 -0700
From: Jakub Kicinski <kuba@...nel.org>
To: ende.tan@...rfivetech.com
Cc: netdev@...r.kernel.org, andrew@...n.ch, alexandre.torgue@...s.st.com,
 joabreu@...opsys.com, davem@...emloft.net, edumazet@...gle.com,
 pabeni@...hat.com, mcoquelin.stm32@...il.com, linux-kernel@...r.kernel.org,
 linux-stm32@...md-mailman.stormreply.com,
 linux-arm-kernel@...ts.infradead.org, leyfoon.tan@...rfivetech.com,
 minda.chen@...rfivetech.com, endeneer@...il.com
Subject: Re: [net-next,v1,1/1] net: stmmac: Introduce set_rx_ic() for
 enabling RX interrupt-on-completion

On Wed, 14 Aug 2024 17:24:38 +0800 ende.tan@...rfivetech.com wrote:
> From: Tan En De <ende.tan@...rfivetech.com>
> 
> Currently, some set_rx_owner() callbacks set interrupt-on-completion bit
> in addition to OWN bit, without inserting a dma_wmb() barrier. This
> might cause missed interrupt if the DMA sees the OWN bit before the
> interrupt-on-completion bit is set.
> 
> Thus, let's introduce set_rx_ic() for enabling interrupt-on-completion,
> and call it before dma_wmb() and set_rx_owner() in the main driver,
> ensuring proper ordering and preventing missed interrupt.

Having multiple indirect function calls to write a single descriptor 
is really not great. Looks like it's always bit 31, can't this be coded
up as common handler which sets bit 31 in the appropriate word (word
offset specified per platform)?

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