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Message-ID:
 <AM9PR04MB850617C07DDFFEA551622F58E2832@AM9PR04MB8506.eurprd04.prod.outlook.com>
Date: Sun, 18 Aug 2024 21:52:53 +0000
From: "Jan Petrous (OSS)" <jan.petrous@....nxp.com>
To: "Jan Petrous (OSS)" <jan.petrous@....nxp.com>, "David S. Miller"
	<davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski
	<kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>, Rob Herring
	<robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
	<conor+dt@...nel.org>, Alexandre Torgue <alexandre.torgue@...s.st.com>, Jose
 Abreu <joabreu@...opsys.com>, Maxime Coquelin <mcoquelin.stm32@...il.com>,
	Vinod Koul <vkoul@...nel.org>, Andrew Lunn <andrew@...n.ch>, Heiner Kallweit
	<hkallweit1@...il.com>, Russell King <linux@...linux.org.uk>, Richard Cochran
	<richardcochran@...il.com>, Giuseppe Cavallaro <peppe.cavallaro@...com>
CC: "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-stm32@...md-mailman.stormreply.com"
	<linux-stm32@...md-mailman.stormreply.com>,
	"linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "linux-arm-msm@...r.kernel.org"
	<linux-arm-msm@...r.kernel.org>, dl-S32 <S32@....com>
Subject: [PATCH v2 7/7] net: stmmac: dwmac-s32cc: Read PTP clock rate when
 ready

The PTP clock is read by stmmac_platform during DT parse.
On S32G/R the clock is not ready and returns 0. Postpone
reading of the clock on PTP init.

Co-developed-by: Andrei Botila <andrei.botila@....org>
Signed-off-by: Andrei Botila <andrei.botila@....org>
Signed-off-by: Jan Petrous (OSS) <jan.petrous@....nxp.com>
---
 drivers/net/ethernet/stmicro/stmmac/dwmac-s32cc.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-s32cc.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-s32cc.c
index 8daa01d01f29..92c51005cbed 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-s32cc.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-s32cc.c
@@ -149,6 +149,18 @@ static void s32cc_fix_mac_speed(void *priv, unsigned int speed, unsigned int mod
 		dev_err(gmac->dev, "Can't set tx clock\n");
 }
 
+static void s32cc_gmac_ptp_clk_freq_config(struct stmmac_priv *priv)
+{
+	struct plat_stmmacenet_data *plat = priv->plat;
+
+	if (!plat->clk_ptp_ref)
+		return;
+
+	plat->clk_ptp_rate = clk_get_rate(plat->clk_ptp_ref);
+
+	netdev_dbg(priv->dev, "PTP rate %lu\n", plat->clk_ptp_rate);
+}
+
 static int s32cc_dwmac_probe(struct platform_device *pdev)
 {
 	struct plat_stmmacenet_data *plat;
@@ -204,6 +216,7 @@ static int s32cc_dwmac_probe(struct platform_device *pdev)
 	plat->init = s32cc_gmac_init;
 	plat->exit = s32cc_gmac_exit;
 	plat->fix_mac_speed = s32cc_fix_mac_speed;
+	plat->ptp_clk_freq_config = s32cc_gmac_ptp_clk_freq_config;
 
 	plat->bsp_priv = gmac;
 
-- 
2.46.0


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